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path: root/arch/isa_parser.py
AgeCommit message (Expand)Author
2006-05-23Updates to isa parser to make it see dependencies properly with the new scanner.Kevin Lim
2006-03-03Changes to support automatic renaming of the shadow registers at decode time....Kevin Lim
2006-02-27Changes to put all the misc regs within the misc reg file. This includes the...Kevin Lim
2006-02-23Enable building only selected CPU models via new sconsSteve Reinhardt
2006-02-23Create a Builder object for .isa files in arch/SConscript.Steve Reinhardt
2006-02-19Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Gabe Black
2006-02-19Merge gblack@m5.eecs.umich.edu:/bk/multiarchGabe Black
2006-02-19Changes to untemplate StaticInst and StaticInstPtr, change the isa to a names...Gabe Black
2006-02-18Support NNPC and branch instructions ... Outputs to decoder.cc correctlyKorey Sewell
2006-02-16Fixes to handle generating the initiateAcc and completeAcc functions a little...Kevin Lim
2006-02-15Gives separate methods for initiating and completing a memory access, which w...Kevin Lim
2006-02-12Polishing of isa_parser.py internal operand handling, resulting inSteve Reinhardt
2006-02-11Minor cleanup of operand type and traits code in isa_parser.py.Steve Reinhardt
2006-02-11Add keyword parameters and list-valued arguments toSteve Reinhardt
2006-02-10Change how memory operands are handled in ISA descriptions.Steve Reinhardt
2006-02-09Minor cleanup of include-handling code in isa_parser.py.Steve Reinhardt
2006-02-09Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Steve Reinhardt
2006-02-09Change how isa_parser.py generates C++ names for isa_desc operands.Steve Reinhardt
2006-01-24Some stuff aparently didn't get committed which was from before the new repos...Gabe Black
2005-10-20Minor tweak to isa_parser.Steve Reinhardt
2005-09-11Explicitly handle rounding on FP-to-integer conversions.Steve Reinhardt
2005-06-05Fix a few broken or inconsistently formatted copyrightsSteve Reinhardt
2005-06-05Many files:Steve Reinhardt
2005-06-04shuffle files around for new directory structureNathan Binkert
2005-06-04Remove the inorder CPUNathan Binkert
2005-05-03Large update of several parts of my code. The most notable change is the inc...Kevin Lim
2005-02-25Initial light-weight OoO CPU checkin, along with gcc-3.4 fixes.Kevin Lim
2005-02-04Hand mergeKevin Lim
2005-02-03Add support for CPU models to execute the effectiveSteve Reinhardt
2005-01-11Merge changes.Kevin Lim
2004-11-03Add Inorder CPU modelTaeho Kgil
2004-09-23Update to make multiple instruction issue and different latencies work.Kevin Lim
2004-08-20Check in of new CPU. This checkin works under non-Fullsystem mode, with no c...Kevin Lim
2004-05-31Renamed OpClass enum members: they all end in 'Op' now.Steve Reinhardt
2004-05-28Updated FastCPU model with all the recent changes.Kevin Lim
2004-05-18Add a level of indirection to the register accessors used inSteve Reinhardt
2004-05-17Significant changes to ISA description to completely factorSteve Reinhardt
2004-05-10Do a better job of factoring out CPU model in ISA description.Steve Reinhardt
2003-10-13Fix up decoder.cc generation... this got broken at the directory reorg.Steve Reinhardt
2003-10-07Fix attribution for decoder.cc.Steve Reinhardt
2003-10-07isa_parser.py:Nathan Binkert
2003-10-07Import changesetSteve Raasch