| Age | Commit message (Collapse) | Author |
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update for newmem
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/sparc/faults.cc:
arch/sparc/faults.hh:
added unimp faults for mips
arch/mips/isa/base.isa:
arch/mips/isa/includes.isa:
thou shalt not put includes inside a namespace
dev/alpha_console.cc:
fix formatting
dev/io_device.hh:
add comments
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
update for newmem
sim/process.cc:
fix seemingly wronge code.
--HG--
extra : convert_revision : 9dcfe188d00d525b935d8ef4fa323280bbfa9a0e
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arch/alpha/isa_traits.hh:
used for SimpleCPU instead of explicitly calling the namespace we declare in isa_traits.hhs
so other archs. can use SimpleCPU
arch/mips/SConscript:
dont include common_syscall or tru64
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
Change Faults to new format
arch/mips/isa/decoder.isa:
Fix readMiscReg access
Made change so that you cant explicitly tell if a instruction nop,ehb,or ssnop... These are all variants
of the sll instruction so I may need to make a separte class of instructions to handle thse better
arch/mips/isa/includes.isa:
add isa_traits.hh and MipsISA included into every auto-gen file
arch/mips/isa_traits.cc:
create copyMiscRegs function...
delete useless code
arch/mips/isa_traits.hh:
clean up for build
arch/mips/linux_process.cc:
mem is now getMemPort(), linux process objects now take in a system argument
arch/mips/linux_process.hh:
new argument for linux process
arch/mips/process.cc:
add system
arch/mips/process.hh:
add system variable
cpu/cpu_exec_context.cc:
Change AlphaISA to TheISA
cpu/exec_context.hh:
add readNextNPC and setNextNPC functions
cpu/simple/cpu.cc:
include isa_traits for namespace declariation
cpu/simple/cpu.hh:
PC & NPC access/modify functions
arch/mips/utility.hh:
file needed for compile
--HG--
extra : convert_revision : 29a327e79c51c6174a6e526aa68c7aab7e7eb535
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arch/mips/faults.hh:
remove nonsense
arch/mips/isa/base.isa:
define R31
arch/mips/isa/bitfields.isa:
forgotten bitfields
arch/mips/isa/decoder.isa:
INT64 -> int64_t
arch/mips/isa/formats.isa:
fix comments
arch/mips/isa/formats/branch.isa:
Branch -> BranchLikely
RB -> RT
arch/mips/isa/formats/fp.isa:
Make FP ops generates
arch/mips/isa/formats/mem.isa:
RA,RB -> RS,RT
arch/mips/isa/formats/noop.isa:
Rc -> Rd
arch/mips/isa/formats/util.isa:
forgot brace and semicolon
arch/mips/isa/includes.isa:
remove unnecessary files
arch/mips/isa_traits.hh:
spacing
cpu/static_inst.hh:
add cond_delay_slot flag
--HG--
extra : convert_revision : 3bc7353b437f9a764e85cc462bed86c9d654eb37
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arch/mips/isa/formats/int.format:
Looks like Integer Ops with Immediates may not need their own separate class because all those instructions are distinct from
their reg-reg counterparts
--HG--
rename : arch/mips/isa/bitfields.def => arch/mips/isa/bitfields.isa
rename : arch/mips/isa/decoder.def => arch/mips/isa/decoder.isa
rename : arch/mips/isa/formats.def => arch/mips/isa/formats.isa
rename : arch/mips/isa/includes.h => arch/mips/isa/includes.isa
rename : arch/mips/isa/operands.def => arch/mips/isa/operands.isa
extra : convert_revision : 8e354b4232b28c0264d98d333d55ef8b5a6589cc
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