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Move global checkpoint-related functions and vars into Checkpoint class (as statics).
arch/alpha/pseudo_inst.cc:
dev/disk_image.cc:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
sim/serialize.cc:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
Checkpoint constructor now takes checkpoint directory name instead
of file name.
Make serialize:dir parameter actually set checkpoint directory name
instead of directory in which checkpoint directory is created. If
the value contains a '%', the curTick value is sprintf'd into the
format to create the directory name. The default is backwards compatible
with the old fixed name ("m5.%012d").
sim/serialize.hh:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
Checkpoint constructor now takes checkpoint directory name instead
of file name.
--HG--
extra : convert_revision : d0aa87b62911f405a4f5811271b9e6351fdd9fe4
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arch/alpha/alpha_tru64_process.cc:
So, I don't know why linux uses an off_t here.
I'm also not sure why linux defines an off_t to be a long
Let's just use long here since it works for linux, and that's
what bsd does
base/inifile.cc:
correct #include for OpenBSD
dev/disk_image.cc:
the correct type for this is streampos
--HG--
extra : convert_revision : f3ac3a3b8515d66e07ffb9780d8a9e387297b6a0
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makefile, such that decoder.cc was not getting rebuilt.
Also add -fno-strict-aliasing to fix all the bizarre problems
I've been having with g++ 3.3.x.
arch/alpha/isa_desc:
Fix compilation problems. AlphaISA is a class now, not a namespace.
--HG--
extra : convert_revision : 1583cebc1258c57cbd286c1955d11648150fa1f4
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arch/alpha/alpha_memory.cc:
Rename md_mode_type to mode_type.
arch/alpha/ev5.cc:
simPalCheck() only gets called on correct path now, so
there's no need to test misspeculating().
arch/alpha/isa_desc:
Get privileged call_pall detection right this time (I hope).
ExecContext::simPalCheck() and Annotate::Callpal() are now
called only on non-speculative executions... this should fix
the bogus pal-call stats we've been seeing (since these are
incremented in simPalCheck()).
Also check for invalid call_pall function codes.
--HG--
extra : convert_revision : 465d6724884007d3fa066d14cd5e6db0cd3954e1
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a checkpoint now gives identical results to running from scratch
and doing at switchover at the same cycle!
- CPUs start at cycle 0 again, not cycle 1.
- curTick is now serialized & unserialized.
- Stats get reset in main (before event loop). Since this is done
after curTick is unserialized, simTicks gets set correctly for
running from a checkpoint.
- Simplify serialization to happen in a single pass.
- s/Serializeable/Serializable/
arch/alpha/isa_traits.hh:
dev/etherlink.hh:
sim/eventq.cc:
sim/eventq.hh:
s/Serializeable/Serializable/
kern/tru64/tru64_system.cc:
sim/process.cc:
Make initial CPU activation on cycle 0 again (not 1).
sim/main.cc:
Reset stats before getting started.
Make error message on falling out of event loop
more meaningful.
sim/serialize.cc:
sim/serialize.hh:
Get rid of now-useless initial pass; serialization is
done in a single pass now.
Serialize & unserialize curTick.
Wrap curTick and mainEventQueue in a "globals" Serializable object.
s/Serializeable/Serializable/
sim/sim_object.cc:
Add static function to serialize all SimObjects.
sim/sim_object.hh:
Add static function to serialize all SimObjects.
s/Serializeable/Serializable/
--HG--
extra : convert_revision : 9dcc411d0009b54b8eb61c3a509680b81b9f6f68
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and SimpleCPU::setStatus() into separate functions. For example,
setStatus(Active) is now activate().
--HG--
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executed in non-privileged (non-PAL) mode.
--HG--
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arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Formatting & doxygen.
--HG--
extra : convert_revision : 4f07dd37e254120800dd0d5c0eb47acc9c00cb3f
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interfaces, and specific support for Alpha Linux. Split syscall emulation
functions into several groups, based on whether they depend on the specific
OS and/or architecture (and all combinations of above), including the use of
template functions to support syscalls with slightly different constants
or interface structs.
arch/alpha/alpha_tru64_process.cc:
Incorporate full Tru64 object definition here, including structure and constant definitions.
This way we can wrap all of the functions inside the object, and not worry about namespace
conflicts because no one outside this file will ever see it.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
Add enums to ObjectFile to indicate the object's architecture and operating system.
cpu/exec_context.cc:
prog.hh is now process.hh
cpu/exec_context.hh:
prog.hh is now process.hh
move architecture-specific syscall arg accessors into ExecContext
cpu/simple_cpu/simple_cpu.cc:
No need to include prog.hh (which has been renamed)
sim/process.cc:
sim/process.hh:
LiveProcess is now effectively an abstract base class.
New LiveProcess::create() function takes an object file and dynamically picks the
appropriate subclass of LiveProcess to handle the syscall interface that file expects
(currently Tru64 or Linux).
--HG--
rename : arch/alpha/fake_syscall.cc => arch/alpha/alpha_tru64_process.cc
rename : sim/prog.cc => sim/process.cc
rename : sim/prog.hh => sim/process.hh
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--HG--
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arch/alpha/pseudo_inst.hh:
Give temporary access of these functions to full cpu junk
(this is a hack!)
--HG--
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--HG--
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arch/alpha/fake_syscall.cc:
Fix a couple of bugs:
- error return codes weren't making it through due to inadvertent cast to unsigned
- sigreturn broken in not one but two ways
- make all file descriptors look like plain files (not ttys)
Added implementations of setuid, getgid, fcntl, and getdirentries from Dave Oehmke
--HG--
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arch/alpha/isa_desc:
A few disassembly changes to make it easier to compare with old machine.def traces:
- Make lds prefetches print f31 instead of r31 as dest.
- Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY
cpu/exetrace.cc:
Left-justify instruction in field, and increase width by 1.
--HG--
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arch/alpha/isa_desc:
move the quiesce instruction out of here so I can conditionally
enable it.
arch/alpha/pseudo_inst.cc:
conditionally enable quiesce
arch/alpha/pseudo_inst.hh:
add quiesce
--HG--
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arch/alpha/pseudo_inst.cc:
yes is not a real value, use true
--HG--
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arch/alpha/pseudo_inst.cc:
Don't forget the descriptions
--HG--
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--HG--
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arch/alpha/isa_desc:
Move the pseudo instructions out of the isa_desc, into their own
file and call out to them when they're to be accessed
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
move SimExit to sim_exit.cc
--HG--
extra : convert_revision : 1c393adb1c18bd0fef065057d7f4e9cf60ac4197
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resetstats
dumpstats
dumpresetstats
m5checkpoint
Lots of cleanup of serialization and stats dumping/resetting to
work with these new instructions
arch/alpha/isa_desc:
Implement more m5 pseduo opcodes:
resetstats
dumpstats
dumpresetstats
m5checkpoint
All of these functions take two optional parameters, the first is a delay,
and the second is a period. The delay tells the simulator to wait the
specified number of nanoseconds before triggering the event, the period
tells the simulator to repeat the event with a specified frequency
base/statistics.cc:
base/statistics.hh:
regReset RegResetCallback
dev/disk_image.cc:
serializeFilename -> CheckpointFile()
sim/debug.cc:
Move this debugging statement to sim_stats.cc
sim/eventq.cc:
Don't AutoDelete an event if it is scheduled since the process()
function could potentially schedule the event again.
sim/main.cc:
DumpStatsEvent is now Statistics::SetupEvent(Dump, curTick)
sim/serialize.cc:
Change the serialize event so that it's possible to cause the
event to repeat. Also make the priority such that the event
happens just before the simulator would exit if both events
were scheduled for the same cycle.
get rid of the serializeFilename variable and provide a CheckpointFile()
function. This function takes a basename that is set in the
configuration, and appends the current cycle to the name so that
multiple checkpoints can be dumped from the same simulation.
Also, don't exit the simulation when a checkpoint file is dumped.
sim/serialize.hh:
serializeFilename -> CheckpointFile()
SetupCheckpoint function to tell the simulator to prepare
to checkpoint at a certain time with a certain period
sim/sim_events.cc:
DumpStatsEvent stuff gets move to sim_stats.(cc|hh)
The context stuff gets moved into the already existing
stats context in stat_context.cc
sim/sim_events.hh:
DumpStatsEvent stuff gets move to sim_stats.(cc|hh)
sim/universe.cc:
Provide some simple functions for converting times into
ticks. These use floating point math to get as close as
possible to the real values. Multipliers are set up ahead
of time
--HG--
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arch/alpha/isa_desc:
regen
--HG--
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Implement a new m5exit instruction with an optional delay
arch/alpha/isa_desc:
move m5exit to m5exit old. The old version of the
instruction is now deprecated
Implement the new exit instruction with the optional delay
sim/sim_events.cc:
sim/sim_events.hh:
Make SimExit take a cycle
sim/universe.cc:
provide ticksPerMS, ticksPerUS, and ticksPerNS so we don't
have to do math during the cycle
--HG--
extra : convert_revision : e2ed47a2e5cfcd57c82086c6fcb4a28bf801c214
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Can now serialize & unserialize DmaRequestEvents and DmaTransferEvents.
Also support serialize/unserialize of pointers to SimObjects and
other Serializable objects.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
unserialize() now takes a Checkpoint* instead of an IniFile*.
cpu/simple_cpu/simple_cpu.cc:
unserialize() now takes a Checkpoint* instead of an IniFile*.
Put ExecContext in its own section so its _status fields doesn't conflict.
sim/eventq.cc:
sim/eventq.hh:
unserialize() now takes a Checkpoint* instead of an IniFile*.
Events get serialized by the event queue only if they're marked
as AutoSerialize... others are assumed to be serialized by something
else (e.g. an owning SimObject) or to not matter.
sim/param.cc:
Shift 'const' in case T is a ptr type.
sim/serialize.cc:
sim/serialize.hh:
Define Checkpoint object to encapsulate everything you need to know
about a checkpoint. Use it to allow lookups of named Serializable
objects (and SimObjects) during unserialization.
unserialize() now takes a Checkpoint* instead of an IniFile*.
--HG--
extra : convert_revision : 8e6baab32405f8f548bb67a097b2f713296537a5
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arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
Serialize TLB contents.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
Complete serialization of SimpleCPU (including owned events).
sim/eventq.cc:
sim/eventq.hh:
Basic serialization for events.
Still need to handle dynamic events (not owned by a SimObject).
sim/serialize.cc:
sim/serialize.hh:
Export serialization filename so PhysicalMemory can
derive its filename from that.
--HG--
extra : convert_revision : 4db851c5880f73f576ca092d5e5ad4256048eb51
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Add support for serializing enums.
arch/alpha/isa_traits.hh:
Add serialize/unserialize functions for RegFile
(defined in new isa_traits.cc).
cpu/exec_context.cc:
Flesh out serialize/unserialize.
sim/serialize.hh:
Add {UN}SERIALIZE_ENUM().
--HG--
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--HG--
extra : convert_revision : 848cfcf3323d224cdb2ff14df6f6996607a5c27f
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it back in,
though most objects don't actually serialize any data.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
Change unserialize param from IniFile& to const IniFile*.
cpu/simple_cpu/simple_cpu.cc:
Change unserialize param from IniFile& to const IniFile*.
Make unserialize call ExecContext::unserialize.
sim/eventq.cc:
Rename MainEventQueue (no spaces) for easier parsing in checkpoints.
Disable event serialization for now, so we can focus on the easy stuff.
sim/serialize.cc:
Change paramIn and arrayParamIn param from IniFile& to const IniFile*.
sim/serialize.hh:
Change unserialize, paramIn, and arrayParamIn params from IniFile& to const IniFile*.
--HG--
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--HG--
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--HG--
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arch/alpha/ev5.cc:
Don't call kernelStats.hwrei() or system->breakpoint() on misspeculated paths.
arch/alpha/isa_desc:
Don't write reegs.intrflag, do Annotate::Callpal, or call xc->syscall
on misspeculated paths.
--HG--
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in the process make m5_exit more generic
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
There's no reason that this needs to be in an arch specific file
arch/alpha/isa_desc:
m5_exit -> SimExit
Emulate callpal halt and cause the simulator to exit
while we're at it, sort #includes
sim/sim_events.cc:
sim/sim_events.hh:
move the m5_exit function here, renaming it to SimExit.
Also Allow the caller to pass in the termination message.
--HG--
extra : convert_revision : 54b43b17a412ab387b8672c27ef0b04fce10ee15
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arch/alpha/isa_desc:
Keep m5 pseudo-instructions (like resetstats) from taking effect
on misspeculated paths.
--HG--
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--HG--
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SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
cpu/simple_cpu/simple_cpu.cc:
Move some common full-system CPU initialization from the
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
Make 'fault' local to SimpleCPU::tick.
cpu/simple_cpu/simple_cpu.hh:
Make 'fault' local to SimpleCPU::tick (not an object member).
--HG--
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--HG--
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--HG--
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of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet). Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time. Also worked at making behavior and naming
in System and Process objects more consistent.
arch/alpha/ev5.cc:
Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
Support for ExecContext switching.
CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
Support for ExecContext switching.
Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
Support for ExecContext switching.
Renamed xcvec array to execContexts to be consistent with Process.
--HG--
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arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/pc_event.hh:
Move to non architecture specific MemReq
--HG--
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specified in the INI and then read inside the simulator.
arch/alpha/isa_desc:
Added new M5FUNC instruction to put allow reading of init_param inside simulator
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/system.cc:
sim/system.hh:
Added support for init_param
--HG--
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This makes testing a bit easier.
arch/alpha/alpha_memory.cc:
cpu/intr_control.cc:
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/alpha_console.cc:
dev/console.cc:
dev/disk_image.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ethertap.cc:
dev/simple_disk.cc:
kern/tru64/tru64_system.cc:
sim/main.cc:
sim/prog.cc:
Need to include builder.hh
sort #includes
sim/sim_object.cc:
sim/sim_object.hh:
Separate the SimObjectBuilder stuff into its own file
--HG--
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Mostly vestiges of Dave's long-gone instruction prefetching stuff.
arch/alpha/isa_traits.hh:
Delete unused extractInstructionPrefetchTarget().
base/inifile.cc:
Delete '#if 0' code
cpu/base_cpu.hh:
Delete unused filterThisInstructionPrefetch() function.
cpu/exetrace.hh:
Delete '#if 0' code (obsolete flags).
--HG--
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stale reference to machine.def).
arch/alpha/isa_desc:
Add comment describing store-conditional result code
cpu/exec_context.hh:
update comments
--HG--
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arch/alpha/aout_machdep.h:
Comment aout_exechdr fields to make doxygen happy.
--HG--
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cpu/pc_event.cc:
SCCS merged
--HG--
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into its own Tru64System object. Also remove the System builder
stuff and create a Tru64System builder. This makes it much
simpler to support more operating systems.
arch/alpha/ev5.cc:
Each system provides its own mechanism for doing a breakpoint.
base/remote_gdb.hh:
#include <map>
cpu/pc_event.cc:
cpu/pc_event.hh:
Separate out System specific PCEvents
cpu/simple_cpu/simple_cpu.cc:
each system provides its own init script
kern/tru64/dump_mbuf.cc:
kern/tru64/printf.cc:
Stick this in a namespace
--HG--
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arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
cpu/static_inst.hh:
CPU -> FullCPU
--HG--
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arch/alpha/isa_desc:
Fix include: cpu.hh renamed to full_cpu.hh
cpu/pc_event.cc:
Didn't need cpu.hh, just base_cpu.hh.
sim/sim_events.cc:
Didn't need cpu.hh, just param.hh.
--HG--
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arch/isa_parser.py:
Fix include path (bitfield.hh -> base/bitfield.hh).
--HG--
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cpu/exec_context.hh:
dev/alpha_console.cc:
sim/system.cc:
sim/system.hh:
Convert from fixed array to a vector
arch/alpha/arguments.hh:
now that CopyData and CopyString are in vtophys.hh, this
include is not necessary
arch/alpha/vtophys.hh:
Include isa_traits.hh for Addr
cpu/pc_event.cc:
Temporarily get this working while we're changing things
--HG--
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arch/alpha/arguments.hh:
arch/alpha/arguments.cc:
sort #includes
--HG--
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