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--HG--
extra : convert_revision : 543313ec248457e6cb2f8315881f030545e8cf45
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arch/alpha/isa_desc:
Reenable copies.
--HG--
extra : convert_revision : 99259c0ff65e742e617cba1c14f5d1bf4be2fee8
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--HG--
extra : convert_revision : 7b56535ee32551f27db8d98172159f63e5099835
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arch/alpha/isa_desc:
Need to return fault for copy operations.
cpu/exec_context.hh:
Add temporary storage to pass source address from copy load to copy store
cpu/simple_cpu/simple_cpu.cc:
Implement copy functions.
cpu/simple_cpu/simple_cpu.hh:
Return fault
--HG--
extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90
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arch/alpha/isa_desc:
Just to make sure, remove the new copy instructions until everything works.
--HG--
extra : convert_revision : cdd3d4c8fa415175aaee04f4a99340dcf82dbc3a
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arch/alpha/ev5.cc:
actually implement the cycle count register
arch/alpha/isa_desc:
the rpcc instruction really just reads the cycle count
register
--HG--
extra : convert_revision : a0edec85672377a62b90950efc17b62b375220b1
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arch/alpha/ev5.cc:
Handle writing IPR_CC and IPR_CC_CTL slightly more intelligently.
(Very slightly).
arch/alpha/isa_desc:
Upper half of rpcc result comes from value written
to IPR_CC, not actual cycle counter.
--HG--
extra : convert_revision : 7161989db8a3f040d0558e2e5a1a162ed1cb4125
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arch/alpha/isa_desc:
Add copy_load and copy_store insts (ldf and stf respectively)
cpu/simple_cpu/simple_cpu.hh:
Add copy functions to SimpleCPU as well
--HG--
extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d
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arch/alpha/osfpal.cc:
Add a string for copypal.
arch/alpha/osfpal.hh:
Add a code for copypal.
cpu/static_inst.hh:
Add an IsCopy flag.
--HG--
extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f
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it actually do something on FullCPU. Still disabled, as it
causes detailed-boot to hang when you turn it on.
arch/alpha/isa_desc:
Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst.
cpu/simple_cpu/simple_cpu.hh:
Changed prefetch() return type from Fault to void.
--HG--
extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7
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tlb index calls that are called from ExecContext::readIpr
arch/alpha/ev5.cc:
Fix misspeculation bugs for misspeculated IPR accesses
--HG--
extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7
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physical addresses.
--HG--
extra : convert_revision : efb4a5229d88cb3c024e0b24f5916048bd42d589
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arch/alpha/vtophys.cc:
fix up vtophys to deal with translations if there
is no ptbr, and to deal with PAL addresses
add ptomem which is just a wrapper for dma_addr
arch/alpha/vtophys.hh:
add ptomem which is a wrapper for dma_addr with the
same usage as vtomem
--HG--
extra : convert_revision : 1ae22073d400e87b708a4a7ef501124227fc6c39
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--HG--
extra : convert_revision : 964126edcf72faf572a9272599264ba2f5cd7aa1
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arch/alpha/alpha_linux_process.cc:
Fixes for Linux emulation:
- stat struct alignment
- osf_{get,set}sysinfo return values
- additional syscall numbers
- initialize $r0 to 0
sim/syscall_emul.cc:
brk(0) just returns brk value (don't update it!)
--HG--
extra : convert_revision : 78e22458321c81e81540d101c9e65e2e4b0ad117
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into zizzer.eecs.umich.edu:/.automount/ziff/z/binkertn/research/m5/memory
--HG--
extra : convert_revision : 9f385ee5b6958373a9a1bc600eb3e5e8b7987f38
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--HG--
extra : convert_revision : 81b365ac9ca8b33cae99107e5b1900f7c46f0866
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--HG--
extra : convert_revision : 3ad9a929051bfe111a1e10618c8595acbbade542
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arch/alpha/isa_desc:
Add cache port bindings for mb & wmb.
--HG--
extra : convert_revision : 72f76150fe471d0dc97bd41598cad4d86a035e39
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benchmarks for alpha-linux.
arch/alpha/alpha_linux_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit, times and rt_sigaction.
Should eventually provide a function for times.
arch/alpha/alpha_tru64_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit.
sim/syscall_emul.cc:
Added implementations for unlink and rename.
sim/syscall_emul.hh:
Added unlink and rename functions.
Added a couple more ioctl requests to ignore.
Print out the PC of any ioctl commands that fail.
--HG--
extra : convert_revision : 8af21c7fa7d0645d3f9324c9ce70ad33590c3c8e
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execution pipeline (Alpha trapb & excb).
Add support for write memory barriers (mostly impacts
store buffer).
Add StaticInst flag to indicate memory barriers, though
this is not modeled in the pipeline yet.
arch/alpha/isa_desc:
Implement trapb, excb, mb, and wmb as insts with
no execution effect (empty execute() function) but
with flags that indicate their side effects.
Also make sure every instruction that needs to go to
the execute stage has a real opClass value, since we
are now using No_OpClass to signal insts that can get
dropped at dispatch.
StaticInst::branchTarget() is now a const method.
cpu/static_inst.hh:
Add flags to indicate serializing insts (trapb, excb) and
memory and write barriers.
Also declare some StaticInst methods as const methods.
dev/etherlink.hh:
sim/eventq.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_object.hh:
Make name() return value const.
--HG--
extra : convert_revision : 39520e71469fa20e0a7446b2e06b494eec17a02c
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arch/alpha/isa_desc:
Add missing branchTarget() method for indirect branches.
cpu/static_inst.hh:
Add comment clarifying when branchTarget() can be used
on indirect branches.
--HG--
extra : convert_revision : 0dcfb36a9792a338cefceb3d1501825abace7ac5
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This avoids incrementing and decrementing the MemReq
reference counters on every call and return.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
Change MemReqPtr parameters to references.
--HG--
extra : convert_revision : 3ba18bdd9f996563988402576bfdd3430e1ab1e5
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arch/alpha/isa_desc:
don't say warn: Warning:
base/misc.cc:
avoid printing two newlines in a row
sim/main.cc:
print out a message just before we enter the event queue
--HG--
extra : convert_revision : 2a824d4b67661903fc739a0fb0759aa91d72382c
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--HG--
extra : convert_revision : 52437e42f15899db46525ad91b2e43c2a96ace36
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(do_data and do_events). If you use the defaults (false and true respectively) you don't have to change your INI files.
arch/alpha/isa_traits.hh:
Add a constant for the maximum address value called MaxAddr.
--HG--
extra : convert_revision : 1371e8b713cc6ed134093e9c208db35dc9741ac7
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Move global checkpoint-related functions and vars into Checkpoint class (as statics).
arch/alpha/pseudo_inst.cc:
dev/disk_image.cc:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
sim/serialize.cc:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
Checkpoint constructor now takes checkpoint directory name instead
of file name.
Make serialize:dir parameter actually set checkpoint directory name
instead of directory in which checkpoint directory is created. If
the value contains a '%', the curTick value is sprintf'd into the
format to create the directory name. The default is backwards compatible
with the old fixed name ("m5.%012d").
sim/serialize.hh:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
Checkpoint constructor now takes checkpoint directory name instead
of file name.
--HG--
extra : convert_revision : d0aa87b62911f405a4f5811271b9e6351fdd9fe4
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arch/alpha/alpha_tru64_process.cc:
So, I don't know why linux uses an off_t here.
I'm also not sure why linux defines an off_t to be a long
Let's just use long here since it works for linux, and that's
what bsd does
base/inifile.cc:
correct #include for OpenBSD
dev/disk_image.cc:
the correct type for this is streampos
--HG--
extra : convert_revision : f3ac3a3b8515d66e07ffb9780d8a9e387297b6a0
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makefile, such that decoder.cc was not getting rebuilt.
Also add -fno-strict-aliasing to fix all the bizarre problems
I've been having with g++ 3.3.x.
arch/alpha/isa_desc:
Fix compilation problems. AlphaISA is a class now, not a namespace.
--HG--
extra : convert_revision : 1583cebc1258c57cbd286c1955d11648150fa1f4
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arch/alpha/alpha_memory.cc:
Rename md_mode_type to mode_type.
arch/alpha/ev5.cc:
simPalCheck() only gets called on correct path now, so
there's no need to test misspeculating().
arch/alpha/isa_desc:
Get privileged call_pall detection right this time (I hope).
ExecContext::simPalCheck() and Annotate::Callpal() are now
called only on non-speculative executions... this should fix
the bogus pal-call stats we've been seeing (since these are
incremented in simPalCheck()).
Also check for invalid call_pall function codes.
--HG--
extra : convert_revision : 465d6724884007d3fa066d14cd5e6db0cd3954e1
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a checkpoint now gives identical results to running from scratch
and doing at switchover at the same cycle!
- CPUs start at cycle 0 again, not cycle 1.
- curTick is now serialized & unserialized.
- Stats get reset in main (before event loop). Since this is done
after curTick is unserialized, simTicks gets set correctly for
running from a checkpoint.
- Simplify serialization to happen in a single pass.
- s/Serializeable/Serializable/
arch/alpha/isa_traits.hh:
dev/etherlink.hh:
sim/eventq.cc:
sim/eventq.hh:
s/Serializeable/Serializable/
kern/tru64/tru64_system.cc:
sim/process.cc:
Make initial CPU activation on cycle 0 again (not 1).
sim/main.cc:
Reset stats before getting started.
Make error message on falling out of event loop
more meaningful.
sim/serialize.cc:
sim/serialize.hh:
Get rid of now-useless initial pass; serialization is
done in a single pass now.
Serialize & unserialize curTick.
Wrap curTick and mainEventQueue in a "globals" Serializable object.
s/Serializeable/Serializable/
sim/sim_object.cc:
Add static function to serialize all SimObjects.
sim/sim_object.hh:
Add static function to serialize all SimObjects.
s/Serializeable/Serializable/
--HG--
extra : convert_revision : 9dcc411d0009b54b8eb61c3a509680b81b9f6f68
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and SimpleCPU::setStatus() into separate functions. For example,
setStatus(Active) is now activate().
--HG--
extra : convert_revision : 4392e07caf6c918db0b535f613175109681686fe
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executed in non-privileged (non-PAL) mode.
--HG--
extra : convert_revision : c8823a1eec27d801a1ed6110ade07354c4dd2a32
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arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Formatting & doxygen.
--HG--
extra : convert_revision : 4f07dd37e254120800dd0d5c0eb47acc9c00cb3f
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interfaces, and specific support for Alpha Linux. Split syscall emulation
functions into several groups, based on whether they depend on the specific
OS and/or architecture (and all combinations of above), including the use of
template functions to support syscalls with slightly different constants
or interface structs.
arch/alpha/alpha_tru64_process.cc:
Incorporate full Tru64 object definition here, including structure and constant definitions.
This way we can wrap all of the functions inside the object, and not worry about namespace
conflicts because no one outside this file will ever see it.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
Add enums to ObjectFile to indicate the object's architecture and operating system.
cpu/exec_context.cc:
prog.hh is now process.hh
cpu/exec_context.hh:
prog.hh is now process.hh
move architecture-specific syscall arg accessors into ExecContext
cpu/simple_cpu/simple_cpu.cc:
No need to include prog.hh (which has been renamed)
sim/process.cc:
sim/process.hh:
LiveProcess is now effectively an abstract base class.
New LiveProcess::create() function takes an object file and dynamically picks the
appropriate subclass of LiveProcess to handle the syscall interface that file expects
(currently Tru64 or Linux).
--HG--
rename : arch/alpha/fake_syscall.cc => arch/alpha/alpha_tru64_process.cc
rename : sim/prog.cc => sim/process.cc
rename : sim/prog.hh => sim/process.hh
extra : convert_revision : 4a03ca7d94a34177cb672931f8aae83a6bad179a
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--HG--
extra : convert_revision : 72eced315bbb331d3068279e60f1f0a390eb687a
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arch/alpha/pseudo_inst.hh:
Give temporary access of these functions to full cpu junk
(this is a hack!)
--HG--
extra : convert_revision : 35499d6bf03b1c21dc918ccc09a6d21719262120
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--HG--
extra : convert_revision : 2ca18ecbf04a1de72391073d0a5309fdbbdfefda
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arch/alpha/fake_syscall.cc:
Fix a couple of bugs:
- error return codes weren't making it through due to inadvertent cast to unsigned
- sigreturn broken in not one but two ways
- make all file descriptors look like plain files (not ttys)
Added implementations of setuid, getgid, fcntl, and getdirentries from Dave Oehmke
--HG--
extra : convert_revision : 53d3f13e1b05e3bde9e68ada3774ca39fa4c0d4c
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arch/alpha/isa_desc:
A few disassembly changes to make it easier to compare with old machine.def traces:
- Make lds prefetches print f31 instead of r31 as dest.
- Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY
cpu/exetrace.cc:
Left-justify instruction in field, and increase width by 1.
--HG--
extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
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arch/alpha/isa_desc:
move the quiesce instruction out of here so I can conditionally
enable it.
arch/alpha/pseudo_inst.cc:
conditionally enable quiesce
arch/alpha/pseudo_inst.hh:
add quiesce
--HG--
extra : convert_revision : e1c474c4bf8761ff58073785d82b2bec9f632885
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arch/alpha/pseudo_inst.cc:
yes is not a real value, use true
--HG--
extra : convert_revision : 30b998ae6f13641d70c9158777a12b00df8742fe
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arch/alpha/pseudo_inst.cc:
Don't forget the descriptions
--HG--
extra : convert_revision : f208ea24d5b34283e962916cb4c7dff976406285
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--HG--
extra : convert_revision : 2010782749ca9c5dd029f71480956b8a1fa96394
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arch/alpha/isa_desc:
Move the pseudo instructions out of the isa_desc, into their own
file and call out to them when they're to be accessed
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
move SimExit to sim_exit.cc
--HG--
extra : convert_revision : 1c393adb1c18bd0fef065057d7f4e9cf60ac4197
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resetstats
dumpstats
dumpresetstats
m5checkpoint
Lots of cleanup of serialization and stats dumping/resetting to
work with these new instructions
arch/alpha/isa_desc:
Implement more m5 pseduo opcodes:
resetstats
dumpstats
dumpresetstats
m5checkpoint
All of these functions take two optional parameters, the first is a delay,
and the second is a period. The delay tells the simulator to wait the
specified number of nanoseconds before triggering the event, the period
tells the simulator to repeat the event with a specified frequency
base/statistics.cc:
base/statistics.hh:
regReset RegResetCallback
dev/disk_image.cc:
serializeFilename -> CheckpointFile()
sim/debug.cc:
Move this debugging statement to sim_stats.cc
sim/eventq.cc:
Don't AutoDelete an event if it is scheduled since the process()
function could potentially schedule the event again.
sim/main.cc:
DumpStatsEvent is now Statistics::SetupEvent(Dump, curTick)
sim/serialize.cc:
Change the serialize event so that it's possible to cause the
event to repeat. Also make the priority such that the event
happens just before the simulator would exit if both events
were scheduled for the same cycle.
get rid of the serializeFilename variable and provide a CheckpointFile()
function. This function takes a basename that is set in the
configuration, and appends the current cycle to the name so that
multiple checkpoints can be dumped from the same simulation.
Also, don't exit the simulation when a checkpoint file is dumped.
sim/serialize.hh:
serializeFilename -> CheckpointFile()
SetupCheckpoint function to tell the simulator to prepare
to checkpoint at a certain time with a certain period
sim/sim_events.cc:
DumpStatsEvent stuff gets move to sim_stats.(cc|hh)
The context stuff gets moved into the already existing
stats context in stat_context.cc
sim/sim_events.hh:
DumpStatsEvent stuff gets move to sim_stats.(cc|hh)
sim/universe.cc:
Provide some simple functions for converting times into
ticks. These use floating point math to get as close as
possible to the real values. Multipliers are set up ahead
of time
--HG--
extra : convert_revision : d06ef26a9237529a1e5060cb1ac2dcc04d4ec252
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arch/alpha/isa_desc:
regen
--HG--
extra : convert_revision : a9da9d2a5fc8a0414491e437747cde48dfb61a20
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Implement a new m5exit instruction with an optional delay
arch/alpha/isa_desc:
move m5exit to m5exit old. The old version of the
instruction is now deprecated
Implement the new exit instruction with the optional delay
sim/sim_events.cc:
sim/sim_events.hh:
Make SimExit take a cycle
sim/universe.cc:
provide ticksPerMS, ticksPerUS, and ticksPerNS so we don't
have to do math during the cycle
--HG--
extra : convert_revision : e2ed47a2e5cfcd57c82086c6fcb4a28bf801c214
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Can now serialize & unserialize DmaRequestEvents and DmaTransferEvents.
Also support serialize/unserialize of pointers to SimObjects and
other Serializable objects.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
unserialize() now takes a Checkpoint* instead of an IniFile*.
cpu/simple_cpu/simple_cpu.cc:
unserialize() now takes a Checkpoint* instead of an IniFile*.
Put ExecContext in its own section so its _status fields doesn't conflict.
sim/eventq.cc:
sim/eventq.hh:
unserialize() now takes a Checkpoint* instead of an IniFile*.
Events get serialized by the event queue only if they're marked
as AutoSerialize... others are assumed to be serialized by something
else (e.g. an owning SimObject) or to not matter.
sim/param.cc:
Shift 'const' in case T is a ptr type.
sim/serialize.cc:
sim/serialize.hh:
Define Checkpoint object to encapsulate everything you need to know
about a checkpoint. Use it to allow lookups of named Serializable
objects (and SimObjects) during unserialization.
unserialize() now takes a Checkpoint* instead of an IniFile*.
--HG--
extra : convert_revision : 8e6baab32405f8f548bb67a097b2f713296537a5
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arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
Serialize TLB contents.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
Complete serialization of SimpleCPU (including owned events).
sim/eventq.cc:
sim/eventq.hh:
Basic serialization for events.
Still need to handle dynamic events (not owned by a SimObject).
sim/serialize.cc:
sim/serialize.hh:
Export serialization filename so PhysicalMemory can
derive its filename from that.
--HG--
extra : convert_revision : 4db851c5880f73f576ca092d5e5ad4256048eb51
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