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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
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Age
Commit message (
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Author
2004-08-02
added m5 debug and m5 switch cpu instruction (doesn't work yet) and
Ali Saidi
2004-07-30
Added debug printk support
Ali Saidi
2004-07-08
fixed a bad merge from linux<->tru64
Ali Saidi
2004-07-02
Need to #include <unistd.h> to build with pread
Nathan Binkert
2004-07-01
implement the readfile pseudo instruction that will read
Nathan Binkert
2004-07-01
rename CopyData to CopyOut and implement CopyIn to copy data
Nathan Binkert
2004-06-30
add asn when tracing tlb stuff
Nathan Binkert
2004-06-28
fix up the recordEvent stuff to support ignoring events
Nathan Binkert
2004-06-22
ifdefed ev5 vs. ev6 differences so Tlaser can work in the linux tree
Ali Saidi
2004-06-22
pull from head before pushing linux tree
Ali Saidi
2004-06-15
Get software prefetching to work in full-system mode.
Steve Reinhardt
2004-06-10
Fixes for detailed boot, made cttz and ctlz instructions more compact,
Ali Saidi
2004-06-08
Updated Copyright with information in bitkeeper changelogs
Ali Saidi
2004-06-04
Added ctlz and cttz instructions to isa_desc for use in the PAL code.
Ali Saidi
2004-06-01
Merge saidi@zizzer:/z/m5/Bitkeeper/m5/
Ali Saidi
2004-05-31
Renamed OpClass enum members: they all end in 'Op' now.
Steve Reinhardt
2004-05-31
Merged head into linux tree
Ali Saidi
2004-05-28
Updated FastCPU model with all the recent changes.
Kevin Lim
2004-05-28
Merged in new FastCPU stuff with existing code.
Kevin Lim
2004-05-27
FastCPU model added. It's very similar to the SimpleCPU, just without a lot ...
Kevin Lim
2004-05-21
add a few statistics events
Nathan Binkert
2004-05-21
rename namespace Statistics to Stats
Nathan Binkert
2004-05-21
Change the namespace Statistics to Stats
Nathan Binkert
2004-05-19
Remove the uncacheable bit 39 check (needs to be merged in with head tree
Andrew Schultz
2004-05-18
Add a level of indirection to the register accessors used in
Steve Reinhardt
2004-05-18
Replace explicit xc->misspeculating() tests in execute() methods
Steve Reinhardt
2004-05-18
merge m5 with linux for the event and binning lifting
Lisa Hsu
2004-05-17
Significant changes to ISA description to completely factor
Steve Reinhardt
2004-05-13
Add VPtr class that makes it possible to esentially create
Nathan Binkert
2004-05-13
remove the annotation junk
Nathan Binkert
2004-05-13
pass the address of both the old an new pcbb on context
Nathan Binkert
2004-05-11
successful merge, linux still builds and runs as far it used to, network devi...
Lisa Hsu
2004-05-11
first pass at merging m5 with linux
Lisa Hsu
2004-05-10
Do a better job of factoring out CPU model in ISA description.
Steve Reinhardt
2004-05-09
Added ULL for 64bit ints
Ali Saidi
2004-05-06
Whole mess'o'changes.. see individual files
Andrew Schultz
2004-05-04
Major stats package cleanup
Nathan Binkert
2004-04-06
Beta version of Python configuration tool. Generates .ini files from
Steve Reinhardt
2004-04-03
More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL).
Steve Reinhardt
2004-04-02
Basic cleanup pass to get rid of a few things that made the Python
Steve Reinhardt
2004-03-24
ULL()
Nathan Binkert
2004-03-11
merge with m5 head
Lisa Hsu
2004-03-04
Reenable functioning copies.
Erik Hallnor
2004-03-04
Automerged
Erik Hallnor
2004-03-04
Copy implementations
Erik Hallnor
2004-02-29
Remove copys from isa_desc, and implement a store and forward bus bridge
Erik Hallnor
2004-02-29
fix rpcc
Nathan Binkert
2004-02-28
Fix handling of rpcc in full-system mode.
Steve Reinhardt
2004-02-27
Added copy instructions to the ISA. Well it didn't break anything yet...
Erik Hallnor
2004-02-27
Initial copy support in the pipeline. Add copypal counting.
Erik Hallnor
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