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arch/mips/isa/decoder.isa:
remove useless cout statements
arch/mips/isa_traits.hh:
space
--HG--
extra : convert_revision : 8b8cf5df6fc3eb92598360343eb887c35cda202d
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Use Load/Store Float Memory Formats for FP mem insts
Fix Load/Store into FP to not create a "nop" if it sees reg 0 at the defintion
arch/mips/isa/decoder.isa:
Rewrite CFC1 & CTC1 instruction definitions
Use Load/Store Float Memory Formats for FP mem insts
arch/mips/isa/formats/fp.isa:
comment changes
arch/mips/isa/formats/mem.isa:
Fix Load/Store Float Memory Formats
--HG--
extra : convert_revision : ef1cb7a78452f8dff044b05c89e61bec866bf1b7
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segfault and break my INT tests
arch/mips/isa/decoder.isa:
Change decoder to read COP1 (floating point) instructions to decode correctly
arch/mips/isa_traits.hh:
Change to use overlapping single/double FP regfile
--HG--
extra : convert_revision : 2d15d6d88939f7e0d63279d5c35d7eea536a573c
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into ewok.(none):/home/gblack/m5/newmem
--HG--
extra : convert_revision : 3eb97976caf57e43119a998c31128ca6f163c05b
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arch/alpha/isa/decoder.isa:
Fixed up Alpha to pass the syscall number directly to the syscall function.
arch/mips/isa/decoder.isa:
Fixed up MIPS to pass the syscall number directly to the syscall function.
arch/mips/isa/operands.isa:
Added an R2 operand which is passed to the syscall function as the syscall number to use.
--HG--
extra : convert_revision : 066d486cd6a2761b29e413c6d526c268788975f3
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arch/sparc/isa/base.isa:
Added a set of abbreviations for the different condition tests.
arch/sparc/isa/decoder.isa:
Fixes and additions to get syscall emulation closer to working.
arch/sparc/isa/formats/branch.isa:
Fixed branches so that the immediate version actually uses the immediate value
arch/sparc/isa/formats/integerop.isa:
Compute the condition codes -before- writing to the state of the machine.
arch/sparc/isa/formats/mem.isa:
An attempt to fix up the output of the disassembly of loads and stores.
arch/sparc/isa/formats/trap.isa:
Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions.
arch/sparc/isa/operands.isa:
Added an R1 operand, and fixed up the numbering
arch/sparc/isa_traits.hh:
SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc.
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in.
arch/sparc/process.cc:
arch/sparc/process.hh:
Fixed up how the initial stack frame is set up.
arch/sparc/regfile.hh:
Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
Changed the syscall mechanism to pass down the syscall number directly.
--HG--
extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43
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Floating Point Mips Tests still need to be added, tested, and debugged.
arch/mips/isa/decoder.isa:
Fix mult and multu instructions. This semantic error causes the problem: <int64> = <int32> * <int32>. Although I was placing
the output into a 64-bit integer the multiply was just doing a 32-bit multiply so the solution is to just use
the 'sd' & 'ud' operands so that the ISA parser will use the int64_t and uint64_t types in calculation.
arch/mips/isa/formats/int.isa:
Trace output fix. Don't print first comma unless there is a destination register for sure!
--HG--
extra : convert_revision : 2c503dca70b104fed0b58454975f745dd3cc2eee
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container classes
Update MIPS/Linux constants
arch/alpha/linux/linux.hh:
move RLIMIT constants to ALPHA/Linux class
arch/alpha/tru64/tru64.hh:
move RLIMIT constants to ALPHA/Tru64 class
arch/mips/mips_linux.hh:
update MIPS constants for MIPS/Linux
kern/linux/linux.hh:
remove RLIMIT constants from generic Linux class... these are now in ISA specific / OS specific classes
kern/tru64/tru64.hh:
remove RLIMIT constants from generic Tru64 class... these are now in ISA specific / OS specific classes
--HG--
extra : convert_revision : 2e2743d73ab18fcd558a5765cb4ef0e9671bd1d7
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<architecture>-<OS>.
This class is derived from the original <OS> class and is used to define information that
is both architecure and OS specific (for example, the AlphaLinux class is derived from the
Linux class and defined in arch/alpha/linux/linux.hh).
SConscript:
no need to compile linux.cc and tru64.cc now, since openFlagsTable has been moved
arch/alpha/SConscript:
compile linux.cc and tru64.cc within alpha arch.
arch/alpha/linux/process.cc:
template syscall functions on AlphaLinux instead of Linux ... AlphaLinux is derived off of Linux
arch/alpha/tru64/process.cc:
template syscall functions on AlphaTru64 instead of Linux ... AlphaTru64 is derived off of Linux
moved tableFunc syscall function into this file
arch/mips/SConscript:
compile mips_linux.cc for openFlags table
arch/mips/isa_traits.hh:
remove constants from here
arch/mips/linux_process.cc:
template syscall functions on MipsLinux instead of Linux ... MipsLinux is derived off of Linux
kern/linux/linux.hh:
remove OSFlags
kern/tru64/tru64.hh:
remove OSFlags def., openFlagTable, and tableFunc ...
sim/syscall_emul.hh:
go back to using "OS" instead of "OSFlags"
arch/alpha/linux/linux.cc:
defines openFlagTable
arch/alpha/linux/linux.hh:
arch/alpha/tru64/tru64.hh:
Alpha Linux constants placed here in class derived from Linux class
arch/alpha/tru64/tru64.cc:
defines openFlagTable for AlphaTru64
arch/mips/mips_linux.cc:
MIPS Linux open flag table
arch/mips/mips_linux.hh:
Mips Linux constants placed here in class derived from Linux class
--HG--
extra : convert_revision : e6c1c2c895429c28fd141732e223e897ab19315e
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into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 5fc80b28362c4acc4dee576f60296b81aea004f2
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Time to make the ide device work
arch/alpha/system.cc:
write the machine type and rev in the correct place
cpu/simple/cpu.cc:
reset the packet structure every time it's reused... wow the
simple cpu code for talking to memory is getting horrible.
dev/alpha_console.cc:
move the setAlphaAccess to startup() to make sure that the console
binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
More verbose bus tracing
mem/packet.hh:
Add a constructor to packet to set the result to unknown and a reset
method in the case it's being reused
mem/vport.hh:
don't need are own read/write methods since the base functional port
ones call writeBlob readBlob which do the translation for us
--HG--
extra : convert_revision : 8d0e2b782bfbf13dc5c59dab1a79a084d2a7da0a
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into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips
--HG--
extra : convert_revision : 4eff6e7ee7a25b8f5fdad7342b195a869cf528d6
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these OSFlags to access architecture-specific AND OS-specific
flags for their functions (e.g. OS::OSFlags::TG_MAP_ANONYMOUS)...
arch/alpha/tru64/process.cc:
sim/syscall_emul.hh:
Add OSFlags to code
arch/mips/isa/decoder.isa:
slight decoder changes (more stylistic then anything)
arch/mips/isa/formats/util.isa:
spacing
arch/mips/isa_traits.hh:
add OSFlags struct to MipsISA namespace. The OS classes then use these OSFlags to access architecture-specific and OS-specific
flags for their functions
kern/linux/linux.hh:
remove constant placement ... define OSFlags in linux.hh
kern/tru64/tru64.hh:
define OSFlags in tru64
--HG--
extra : convert_revision : 59be1036eb439ca4ea1eea1d3b52e508023de6c9
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Set locked flag if required
make SC always return success -- this needs to be fixed at some point
fix a couple of things
FS executes a bit of console code before dying a horrible death
arch/alpha/linux/system.cc:
only need to copy the length of the os flags param, not 256 bytes
cpu/simple/cpu.cc:
Set the physical flag if required
Make LL/SC always return success
mem/bus.cc:
add some dprintfs and change a assert to a panic
mem/port.cc:
delete the buffer with the [] operator
mem/request.hh:
add a function to reset a request
--HG--
extra : convert_revision : f2b78ddad33c7f6ffe1c48791d86609ff1d10d46
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arch/mips/isa_traits.hh:
add FIR misc reg (was lost in merge)
--HG--
extra : convert_revision : b056c9a307e5de08ff8cc4dfc541342d25c141b8
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--HG--
extra : convert_revision : a47368e859b1736bb1c0848960925c6d107435df
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into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips
arch/mips/isa/formats/mem.isa:
Filled in Split-Memory Access Code
arch/mips/isa_traits.hh:
Leave IntRegFile as an array instead of class with member functions
mem/page_table.cc:
take out NO ALIGN FAULT page table access code for now... No need to messs up what works
--HG--
extra : convert_revision : cbf1cce9145daf9ee9ceabc9080271ddb0561489
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arch/mips/isa/bitfields.isa:
add RS_SRL bitfield ...these must be set to 0 for a SRL instruction
arch/mips/isa/decoder.isa:
Make unimplemented instructions Fail instead of just Warn
Edits to SRA & SRAV instructions
Implement CFC1 instructions
Unaligned Memory Access Support (Maybe Not fully functional yet)
Enforce a more strict decode policy (in terms of different bitfields set to 0 on certain instructions)
arch/mips/isa/formats/branch.isa:
Fix disassembly
arch/mips/isa/formats/int.isa:
Add sign extend Immediate and zero extend Immediate to Int class.
Probably a bit unnecessary in the long run since these manipulations could
be done in the actually instruction instead of keep a int value
arch/mips/isa/formats/mem.isa:
Comment/Remove out split-memory access code... revisit this after SimpleCPU works
arch/mips/isa/formats/unimp.isa:
Add inst2string function to Unimplemented panic. PRints out the instruction
binary to help in debuggin
arch/mips/isa/formats/unknown.isa:
define inst2string function , use in unknown disassembly and panic function
arch/mips/isa/operands.isa:
Make "Mem" default to a unsigned word since this is MIPS32
arch/mips/isa_traits.hh:
change return values to 32 instead of 64
arch/mips/linux_process.cc:
assign some syscalls to the right functions
cpu/static_inst.hh:
more debug functions for MIPS (these will be move to the mips directory soon)
mem/page_table.cc:
mem/page_table.hh:
toward a better implementation for unaligned memory access
mem/request.hh:
NO ALIGN FAULT flag added to support unaligned memory access
sim/syscall_emul.cc:
additional SyscallVerbose comments
--HG--
extra : convert_revision : 1987d80c9f4ede507f1f0148435e0bee97d2428c
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Constructor takes a bool to signify that it is either a cpu_request or not a cpu_request.
When accedding variables of a cpu_request it asserts that it is a cpu_request.
It also asserts that a value being read has been written at some point in time prior (not gaurnteeing it is up to date, but it was at least written before read).
There is also a isCpuReq() function to determine if this is a cpu_request. It should be called before accesing a cpu_request only variable.
SConscript:
Add compilation support for request.cc
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/io_device.cc:
mem/page_table.cc:
mem/page_table.hh:
mem/port.cc:
Update for unified request object and accessor functions.
mem/request.hh:
Remove CpuRequest, make it a unified object. Make variables private with accessor functions.
May want to move things from .cc file into header (usually a assert() and either returning a value, or writting two).
--HG--
extra : convert_revision : f1e45cc490dadc7a418634539b03c3e72684a6e3
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into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : a0bfc7495ba0f2916214d6712f67c5c239a210a0
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update for newmem
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/sparc/faults.cc:
arch/sparc/faults.hh:
added unimp faults for mips
arch/mips/isa/base.isa:
arch/mips/isa/includes.isa:
thou shalt not put includes inside a namespace
dev/alpha_console.cc:
fix formatting
dev/io_device.hh:
add comments
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
update for newmem
sim/process.cc:
fix seemingly wronge code.
--HG--
extra : convert_revision : 9dcfe188d00d525b935d8ef4fa323280bbfa9a0e
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--HG--
extra : convert_revision : 28c9cd55d887c9de7156c8cf76b7b91117f749d5
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arch/sparc/regfile.hh:
Added debug output to the setAltGlobals function.
--HG--
extra : convert_revision : b5ed3ff6d6f30e840c2488d846658dadedb59869
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into ewok.(none):/home/gblack/m5/newmem
--HG--
extra : convert_revision : bd6352647798275a12d52d55a129cdddd8e25423
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ALPHA_FS finally compiles again
SConscript:
Use a couple more FS sources, still don't compile that much
arch/alpha/faults.hh:
the unimp fault should probably exist in nonfs too.
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/simconsole.cc:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
sim/process.cc:
sim/system.cc:
fixes for newmem
dev/io_device.hh:
a system pointer is probably useful for every device to have
mem/bus.hh:
mem/physical.cc:
new address ranges function
python/m5/objects/SimpleDisk.py:
simple disk now has a system pointer rather than physmem directly
--HG--
extra : convert_revision : d8c0a5c6510a6210aec5e8adfb0a4a06ec0dcebf
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--HG--
extra : convert_revision : bf43015f5e47768a6e07ce36dc66a38426beceee
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in the InstObjParams constructor.
arch/isa_parser.py:
Expanded the capability of the InstObjParams constructor to allow adding in extra keys for use in templates. These are added as key, value tuples as optional arguements.
arch/sparc/isa/base.isa:
arch/sparc/isa/formats/mem.isa:
arch/sparc/isa/formats/priv.isa:
The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor.
arch/sparc/isa/decoder.isa:
Fixed up alot of instructions, and fixed indentation.
arch/sparc/isa/formats/integerop.isa:
The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor. Also changed the immediate values to be signed.
base/traceflags.py:
Added SPARC traceflag
configs/test/hello_sparc:
Recompiled without -mflat
cpu/cpu_exec_context.cc:
Used the regfile clear function rather than memsetting to 0.
--HG--
extra : convert_revision : b9da6f264f3ebc4ce1815008dfff7f476b247ee9
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arch/alpha/isa_traits.hh:
arch/mips/isa_traits.cc:
Turned the integer register file into a class instead of a typedef to an array.
arch/alpha/regfile.hh:
Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs.
arch/mips/isa_traits.hh:
Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition.
arch/sparc/isa_traits.hh:
Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger.
arch/sparc/regfile.hh:
Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile.
cpu/cpu_exec_context.hh:
Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0.
cpu/exec_context.hh:
Added the changeRegFileContext function.
cpu/exetrace.cc:
Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array.
cpu/exetrace.hh:
Get the address of the regs object, now that it isn't an array.
--HG--
extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
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SConscript:
comment out most devices
add vport.cc
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
push in alpha name space
fix for new memory system
arch/alpha/faults.cc:
arch/alpha/faults.hh:
Added an unimplemented fault that can be returned if a certain
function isn't implemented
arch/alpha/freebsd/system.cc:
arch/alpha/linux/system.cc:
arch/alpha/stacktrace.cc:
arch/alpha/system.cc:
arch/alpha/tlb.hh:
arch/alpha/tru64/system.cc:
fixed for new memory system
arch/alpha/tlb.cc:
fixed for new memory system
removed code that seems to have no purpose
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
fixed for new memory system
put in namespace AlphaISA
base/remote_gdb.cc:
fix for new memory system
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
create two ports one of physical accesses and one for superpage accesses
Add functions getVirtPort() getPhysPort() delVirtPort(). To get statically
allocated physical or virtual ports or if an execcontext is passed in
get a dynamically allocated virtual port
dev/alpha_console.cc:
dev/alpha_console.hh:
Redo for new memory system
dev/io_device.cc:
dev/io_device.hh:
new I/O devices for new memory system
kern/linux/events.cc:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/tru64/dump_mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
Arguments now in namespaces
kern/tru64/tru64_events.cc:
mem/bus.cc:
fix for new memory syste
mem/physical.hh:
new addressranges function
getPort should be public
mem/port.hh:
Add write/read methods to functional port
update getDeviceAddrRanges to have a list of both snoops and response lists
sim/pseudo_inst.cc:
sim/system.cc:
sim/system.hh:
Update for new mem system
sim/vptr.hh:
comment out code and replace with panics
This will need to be fixed at some point, but it's not easy.
--HG--
extra : convert_revision : 41f41f422cfbab3751284d55cccb6ea64a7956e2
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into ewok.(none):/home/gblack/m5/newmem
--HG--
extra : convert_revision : 08ae5e999d9b313e3e40cb6d58863905b70ca781
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arch/sparc/isa/base.isa:
arch/sparc/isa/decoder.isa:
arch/sparc/isa/formats.isa:
arch/sparc/isa/formats/branch.isa:
arch/sparc/isa/formats/integerop.isa:
arch/sparc/isa/formats/mem.isa:
arch/sparc/isa/formats/nop.isa:
arch/sparc/isa/formats/trap.isa:
arch/sparc/isa/formats/unknown.isa:
arch/sparc/isa/includes.isa:
arch/sparc/isa/operands.isa:
Fixes towards running in syscall emulation mode.
arch/sparc/linux/process.cc:
Fixed the assert and comment to check that the Num_Syscall_Descs is less than or equal to 284. Why does this assert need to exist anyway?
base/loader/elf_object.cc:
Cleared out comments about resolved issues.
cpu/simple/cpu.cc:
Use NNPC for both SPARC and MIPS, instead of just MIPS
configs/test/hello_sparc:
A test program for SPARC which prints "Hello World!"
--HG--
rename : arch/sparc/isa/formats/noop.isa => arch/sparc/isa/formats/nop.isa
extra : convert_revision : 10b3e3b9f21c215d809cffa930448007102ba698
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SE mode now has a port that goes to whatever toplevel mem object the
CPU sees that does the appropriate translation for syscall emulation
SConscript:
translating port is a syscall emu only source
arch/alpha/system.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
Use the new functional port to write the binaries into memory
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/simple/cpu.cc:
We aren't always going to be writing straight to memory with syscalls
support writing to a cache
mem/port.hh:
Add a simple unidirectional functional port that panics on any incoming requests
mem/translating_port.hh:
make translating port inherit from the simple port
sim/system.cc:
sim/system.hh:
Add a functional port that is used to load the original binaries
--HG--
extra : convert_revision : 9096866d0b23e3aceea68394abb76e63c0f8fd8d
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arch/alpha/arguments.cc:
rather than returning 0, put a panic in... it will actually make us fix
this rather than scratching our respective heads
base/loader/object_file.cc:
base/loader/object_file.hh:
Object loader now takes a port rather than a translating port
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
sim/process.cc:
Make translating port a type of port rather than anything special
cpu/simple/cpu.cc:
no need to grab a port from the cpu anymore
mem/physical.cc:
add an additional type of port to physicalmemory called "functional"
Only used for functional accesses (loading binaries/syscall emu)
mem/port.hh:
make readBlok/writeBlob virtual so translating port can do the
translation first
mem/translating_port.cc:
mem/translating_port.hh:
Make TranslatingPort inherit from Port
sim/system.cc:
header file that doesn't exit removed
--HG--
extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
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arch/alpha/arguments.cc:
There will not be a phys mem ptr in the XC in the newmem. This read will have to go through something else.
arch/alpha/ev5.cc:
Remove instantiations of these functions for the FastCPU, as the FastCPU is not really used. Also this messed up the ability to specify which CPU models are being built.
cpu/exec_context.hh:
Remove getPhysMemPtr() function.
cpu/exetrace.cc:
Include sim/system.hh, and sort the includes.
cpu/simple/cpu.cc:
Fixes for full system compilation.
kern/system_events.cc:
Remove include of encumbered FullCPU. The branch prediction will need to be fixed up in a more generic way in the future.
--HG--
extra : convert_revision : a8bbf562a277aa80e8f40112570c0a825298a05c
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fix tlbs for newmem
SConscript:
page_table.cc is a syscall only kinda thing
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
fix tlbs for newmem
--HG--
extra : convert_revision : 0aafcb9698b993a807be883bde1696ee4d33b408
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into ewok.(none):/home/gblack/m5/newmem
--HG--
extra : convert_revision : 7866241cf43416636cbd6a3a4f6eeda561ed2e27
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into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 5ab4ce9f6ec7af326d8906060ae3558cfd67ca08
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don't ever include a file while in a namespace
start of making alpha console new memsystem happy
Make a BasePioDevice which is what all the simple Pio devices will inherit from
add a description of when the data pointer will have memory
arch/alpha/isa_traits.hh:
don't ever include a file while in a namespace
dev/alpha_console.cc:
dev/alpha_console.hh:
start of making alpha console new memsystem happy
dev/io_device.cc:
dev/io_device.hh:
Make a BasePioDevice which is what all the simple Pio devices will inherit from
mem/packet.hh:
add a description of when the data pointer will have memory
--HG--
extra : convert_revision : 495c0915541f9cad3eb42891e60b4ecbee7952bf
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into ewok.(none):/home/gblack/m5/newmem
--HG--
extra : convert_revision : 984b015700ccef71d95b4d7d775a7b3f24084dc6
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--HG--
extra : convert_revision : c580bc6bd308fd502fb5a14ea84b5214e1d2718e
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The latter causes multiple variable definitions if the same operand
is used as both a src and a dest.
arch/alpha/isa/mem.isa:
arch/mips/isa/formats/mem.isa:
Use op_decl instead of op_src_decl + op_dest_decl.
The latter causes multiple variable definitions if the same operand
is used as both a src and a dest.
--HG--
extra : convert_revision : c14d91b293d3afef45c8728d3d8784f372c0b7f4
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(which wasn't working since panic() isn't declared yet here).
arch/alpha/faults.hh:
Make ItbFault methods abstract instead of calling panic()
(which wasn't working since panic() isn't declared yet here).
--HG--
extra : convert_revision : b15242baa370777f265a3f6b7d5f5c05702b016f
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Makes .isa files cleaner and simplifies scanner too.
Simplified scanner to work under both old and new versions of scons.
arch/SConscript:
Simplify .isa scanner... seems to work with both scons 0.96.1 and 0.96.91 now.
Assumes .isa ##include paths are relative to including file.
arch/alpha/isa/main.isa:
arch/mips/isa/formats/formats.isa:
arch/mips/isa/main.isa:
arch/sparc/isa/formats.isa:
arch/sparc/isa/main.isa:
Make ##include paths relative to including file.
arch/isa_parser.py:
Make ##include file paths relative to including file.
Makes .isa files cleaner and simplifies scanner too.
Partial rewrite of include-handling code to use cool re.sub() feature
where you can specify a function to provide the replacement string.
Minor cleanup of error-handling code.
Also got rid of '#!' at top to make caller choose which python interpreter
is used (since SPARC now requires 2.4 to build, we may need to do that via
scons in the future).
--HG--
rename : arch/mips/isa/formats.isa => arch/mips/isa/formats/formats.isa
extra : convert_revision : 15a3920fa3aaf80cd94083eda853aa4e49425045
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--HG--
extra : convert_revision : 9ad2bde341a9efb2826159229427b719ff2142f4
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into ewok.(none):/home/gblack/m5/newmem
--HG--
extra : convert_revision : 7effd744f9061d4aa8e9c3fa769115dfa73cbb79
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arch/sparc/isa/decoder.isa:
Replaced register number munging with RdLow and RdHigh operands.
arch/sparc/isa/formats/mem.isa:
Fixed how the address calculation code is dealt with.
arch/sparc/isa/operands.isa:
Changed the tabbing so that the whole oeprands block was consistent, and added RdLow and RdHigh operands. These registers are used when Rd is meant to refer to a pair of registers, rather than just one.
arch/sparc/isa_traits.hh:
Moved some functions to the new (to SPARC) utility.hh file. Also, dummy Fpcr_DepTag and Uniq_DepTag DepTags were added to pacify Tru64. These need to be removed, and Tru64 needs to not be compiled in if it isn't appropriate.
arch/sparc/regfile.hh:
Changed regSpace to have the correct size.
arch/sparc/utility.hh:
A new file for sparc to match the one for alpha.
--HG--
extra : convert_revision : ff6b529093d15f327ec11f067ad533bacdba9932
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through its own fault() method; this is handled by the fault's invoke() methods.
arch/alpha/faults.cc:
Move TLB fault code into the normal fault invoke() method.
arch/alpha/faults.hh:
Move DTB/ITB fault handling code into their own class with a specific invoke() method. Have DTB/ITB faults derive from these classes.
Unfortunately the DtbAlignmentFault is somewhat odd; it's a normal alignment fault, but it must also set some specific IPRs.
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
Setting IPRs is now handled through the fault itself.
--HG--
extra : convert_revision : 5cb92ce2186ff79f632bfcbc9ba62a8a04400eae
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into ewok.(none):/home/gblack/m5/newmem
--HG--
extra : convert_revision : 762df7bf15e8e22a8fab8bbcd933047d1c8cdfa9
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arch/sparc/isa/decoder.isa:
Fixed comments so they don't comment out the ending braces of the format specifier.
--HG--
extra : convert_revision : 3f037c0a17abd0dff71d22fdcd95959c3670e88a
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arch/mips/isa/base.isa:
disassembly fixes
arch/mips/isa/decoder.isa:
support for unaligned loads/stores
arch/mips/isa_traits.hh:
edit Syscall Reg values
arch/mips/linux_process.cc:
call writevFunc on writev syscall
--HG--
extra : convert_revision : 4aea6d069bd7ba0e83b23d2d85c50d68532f0454
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