Age | Commit message (Collapse) | Author |
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that the script doesn't deal with.
Don't bother with copyright notices in generated files.
LICENSE:
Fix author list.
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
Fix inconsistently formatted copyright.
arch/isa_parser.py:
base/traceflags.py:
Fix copyright & author list.
Don't bother with copyrights in generated files.
dev/rtcreg.h:
Fix broken copyright.
--HG--
extra : convert_revision : d628e63c495960e2b129cef0aa8fddbdd4dabd45
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Remove RCS Id string
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ecoff_machdep.h:
arch/isa_parser.py:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.cc:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/kgdb.h:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/coff_sym.h:
base/loader/coff_symconst.h:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/traceflags.py:
base/userinfo.cc:
base/userinfo.hh:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/o3/2bit_local_pred.cc:
cpu/o3/2bit_local_pred.hh:
cpu/o3/alpha_cpu.cc:
cpu/o3/alpha_cpu.hh:
cpu/o3/alpha_cpu_builder.cc:
cpu/o3/alpha_dyn_inst.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/alpha_impl.hh:
cpu/o3/alpha_params.hh:
cpu/o3/bpred_unit.cc:
cpu/o3/bpred_unit.hh:
cpu/o3/bpred_unit_impl.hh:
cpu/o3/btb.cc:
cpu/o3/btb.hh:
cpu/o3/comm.hh:
cpu/o3/commit.cc:
cpu/o3/commit.hh:
cpu/o3/commit_impl.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/cpu_policy.hh:
cpu/o3/decode.cc:
cpu/o3/decode.hh:
cpu/o3/decode_impl.hh:
cpu/o3/fetch.cc:
cpu/o3/fetch.hh:
cpu/o3/fetch_impl.hh:
cpu/o3/free_list.cc:
cpu/o3/free_list.hh:
cpu/o3/iew.cc:
cpu/o3/iew.hh:
cpu/o3/iew_impl.hh:
cpu/o3/inst_queue.cc:
cpu/o3/inst_queue.hh:
cpu/o3/inst_queue_impl.hh:
cpu/o3/mem_dep_unit.cc:
cpu/o3/mem_dep_unit.hh:
cpu/o3/mem_dep_unit_impl.hh:
cpu/o3/ras.cc:
cpu/o3/ras.hh:
cpu/o3/regfile.hh:
cpu/o3/rename.cc:
cpu/o3/rename.hh:
cpu/o3/rename_impl.hh:
cpu/o3/rename_map.cc:
cpu/o3/rename_map.hh:
cpu/o3/rob.hh:
cpu/o3/rob_impl.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/o3/store_set.cc:
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.cc:
cpu/o3/tournament_pred.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/Makefile:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/m5/m5.c:
util/m5/m5op.h:
util/m5/m5op.s:
util/tap/Makefile:
util/tap/tap.cc:
util/term/Makefile:
util/term/term.c:
Remove RCS Id string
--HG--
extra : convert_revision : fc5b0a6ee2a213785bd58c51ce82eb2f769d6b88
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--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
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arch/alpha/alpha_tru64_process.cc:
Sort #includes
Make code more portable. g++ doesn't seem to always like
struct ::stat (and others). So, we typedef stat outside of
the namespace as something else and use the typedef
base/hostinfo.cc:
use snprintf to quell warning
base/inifile.cc:
use strncpy to quell warning
base/stats/events.cc:
don't use strcpy
cpu/beta_cpu/btb.cc:
use FloorLog2 instead of log2
cpu/beta_cpu/comm.hh:
cpu/beta_cpu/inst_queue.hh:
cpu/beta_cpu/sat_counter.hh:
use sim/host.hh instead of stdint.h
--HG--
extra : convert_revision : 59bd9235dda74e72a8b6a70b3f3a981840384f3f
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base/loader/elf_object.cc:
elf_version is an odd function. Don't use assert since it
has a necessary side effect.
--HG--
extra : convert_revision : 8c48f91afe6c7ff5030ac1a534dcda7e2e0c5c57
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object defined there was renamed Root long ago).
SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
base/misc.cc:
base/pollevent.cc:
base/pollevent.hh:
base/stats/events.cc:
base/trace.hh:
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/inst_queue_impl.hh:
cpu/pc_event.cc:
cpu/static_inst.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
sim/builder.cc:
sim/eventq.cc:
sim/main.cc:
sim/root.cc:
sim/stat_control.cc:
Rename sim/universe.{cc,hh} to root.{cc,hh}.
--HG--
rename : sim/universe.cc => sim/root.cc
extra : convert_revision : b8699e81e285253d66da75412e7bb2c251c0389a
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into zizzer.eecs.umich.edu:/z/stever/bk/m5
--HG--
extra : convert_revision : 13696a8e526f7ded7555d009d03bdc7551557571
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base/misc.hh:
Add some comments explaining the difference between
panic() and fatal().
--HG--
extra : convert_revision : 876f0c98276fa1060c0589dc179022a297a8ed2e
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into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : ac0788599c365b2d7fe0870f0fea4b62c3b3ef22
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arch/alpha/alpha_tru64_process.cc:
getdirent isn't implemented by cygwin. panic if this function is
executed. (It shouldn't be too much to emulate it using opendir,
readdir, etc.)
arch/alpha/pseudo_inst.cc:
Use lseek once and read instead pread.
base/intmath.hh:
we want int, long, and long long variations of FloorLog2 instead
of int32_t, int64_t. Otherwise, we leave one out.
base/socket.cc:
Fix define that seems to be for apple
sim/serialize.cc:
don't use the intXX_t stuff, instead, use the real types
so we're sure that we cover all of them.
--HG--
extra : convert_revision : 9fccaff583100b06bbaafd95a162c4e19beed59e
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base/traceflags.py:
Include new flags
--HG--
extra : convert_revision : 8017cbe256860dce8b1efc1b4e1e81e883895b90
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SConscript:
Add prefetcher to the compilation
base/traceflags.py:
Add a trace flag for hardware prefetches
--HG--
extra : convert_revision : bc210192a2b75b1470b2cd9d5d470fc61cb11315
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file in the new CPU case.
cpu/static_inst.hh:
Hand-merge. These execute functions are within an external file in the new CPU case.
--HG--
extra : convert_revision : a34112f471fa31bdd5bb53552ddd704b9571c110
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base/statistics.hh:
Get rid of operator%... g++ 3.4 complains that this isn't defined
for doubles (which makes sense). We never use it anyway.
--HG--
extra : convert_revision : 3ca724e1cc42559226549835f6cd3509308e02ca
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into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : ba556bbc93275fcd920a0529383fd480bb7218de
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SConscript:
Include new files.
arch/alpha/isa_desc:
Make the eaCompPtr and memAccPtr non-const so that execute() can be called on them.
arch/alpha/isa_traits.hh:
Add enum for total number of data registers.
arch/isa_parser.py:
base/traceflags.py:
Include new light-weight OoO CPU model.
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
Changes to abstract more away from the base dyn inst class.
cpu/beta_cpu/2bit_local_pred.cc:
cpu/beta_cpu/2bit_local_pred.hh:
cpu/beta_cpu/tournament_pred.cc:
cpu/beta_cpu/tournament_pred.hh:
Remove redundant SatCounter class.
cpu/beta_cpu/alpha_dyn_inst.cc:
cpu/beta_cpu/alpha_full_cpu.cc:
cpu/beta_cpu/alpha_full_cpu.hh:
cpu/beta_cpu/bpred_unit.cc:
cpu/beta_cpu/inst_queue.cc:
cpu/beta_cpu/mem_dep_unit.cc:
cpu/beta_cpu/ras.cc:
cpu/beta_cpu/rename_map.cc:
cpu/beta_cpu/rename_map.hh:
cpu/beta_cpu/rob.cc:
Fix for gcc-3.4
cpu/beta_cpu/alpha_dyn_inst.hh:
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
Fixes for gcc-3.4.
Include more variables and functions that are specific to AlphaDynInst which were once in BaseDynInst.
cpu/beta_cpu/alpha_full_cpu_builder.cc:
Make params match the current params inherited from BaseCPU.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
Fixes for gcc-3.4
cpu/beta_cpu/full_cpu.cc:
Use new params pointer in BaseCPU.
Fix for gcc-3.4.
cpu/beta_cpu/full_cpu.hh:
Use new params class from BaseCPU.
cpu/beta_cpu/iew_impl.hh:
Remove unused function.
cpu/simple_cpu/simple_cpu.cc:
Remove unused global variable.
cpu/static_inst.hh:
Include OoODynInst for new lightweight OoO CPU
--HG--
extra : convert_revision : 34d9f2e64ca0313377391e0d059bf09c040286fa
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a faulting instruction is the fault handler, which appears as an independent
instruction to the timing model. New code will stall fetch and not fetch the
fault handler as long as there's a faulting instruction in the pipeline (i.e.,
the faulting inst has to commit first).
Also fix Ali's bad-address assertion that doesn't apply to full system.
Added some more debugging support in the process. Hopefully we'll move to the new
cpu model soon and we won't need it anymore.
arch/alpha/alpha_memory.cc:
Reorganize lookup() so we can trace the result of the lookup as well.
arch/alpha/isa_traits.hh:
Add NoopMachInst (so we can insert them in the pipeline on ifetch faults).
base/traceflags.py:
Replace "Dispatch" flag with "Pipeline" (since I added similar
DPRINTFs in other pipe stages).
cpu/exetrace.cc:
Change default for printing mis-speculated instructions to true (since
that's often what we want, and right now you can't change it from the
command line...).
--HG--
extra : convert_revision : a29a98a373076d62bbbb1d6f40ba51ecae436dbc
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into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : 8a558785c64b7c33e64523d3d887ea6e760c3d2b
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|
configuration so that we can always have binning on.
base/statistics.cc:
If we're binning, and there is no bin active at the time
we check all stats stuff, create a bin.
base/statistics.hh:
FS_MEASURE doesn't exist anymore
base/stats/text.cc:
don't print out bin names if there is only one bin
sim/process.cc:
don't zero stats. It happens automatically.
Don't activate the context at the time it is registered,
instead activate the first context in a startup callback.
sim/process.hh:
Add startup callback to initialize the first exec context
--HG--
extra : convert_revision : bcb23cdb184b0abf7cecd79902f8a59b50f71fe4
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|
into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : 11832134b169aa827a1d03c96ef89edddf4b3dab
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|
output files and the output directory are are handled. Make
the output directory configuration via a command line parameter,
or an environment variable.
SConscript:
Add new output file stuff
base/misc.cc:
dev/simconsole.cc:
use new output file code
cpu/base_cpu.cc:
use new output file code to generate output streams
dev/etherdump.cc:
use the output file code to find the output directory
use a real stream instead of a pointer
dev/etherdump.hh:
use a real stream instead of a pointer
objects/Root.mpy:
output_dir and config_output_file are not longer configured here.
sim/main.cc:
- Completely rework the command line argument passing to deal with
changes in python and output files.
- Update help output to reflect changes.
- Remove all direct support for .ini files. They are strictly
for intermediate representation.
- Remove the --foo:bar=blah syntax for .ini files and add --foo.bar=blah
syntax for python. This will generate: foo.bar = 'blah' in the python
script.
- Add '-d' to set the output directory.
- Use new output file code to access the output stream.
sim/serialize.cc:
use the new code to find the output directory
sim/universe.cc:
Get rid of makeOutputStream. Use the new output file code.
Remove output_dir and config_output_file as parameters.
--HG--
extra : convert_revision : df2f0e13d401c3a60cae1239aa1ec3511721544d
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|
base/str.cc:
base/str.hh:
Add a couple functions that allow you to split a string at
the first or last instance of a delimiter.
--HG--
extra : convert_revision : 2af22639e1b67ac61577c00475a555841a56f902
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|
--HG--
extra : convert_revision : 86c7399b79c17558041a73056745227f70fe8b3b
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into zamp.eecs.umich.edu:/z/ktlim2/m5-patched/m5-new
--HG--
extra : convert_revision : e802c800a478c297d3aa780a9ea3c6701453d91d
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|
base/stats/events.cc:
cast this to an unsigned long long to make the compiler happy
on 64-bit platforms.
--HG--
extra : convert_revision : e893d21bb228cbfb0c23adb7c4eeb1f62209ca1c
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|
but prints everything else.
--HG--
extra : convert_revision : ddb0636f5d5f0c746bd121eaafc0c685b422b006
|
|
into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : c8b7f46e9d0dbff2a12a7375d361098fba352647
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|
sim/param.cc:
Merge changes.
--HG--
extra : convert_revision : b5044e1f7c48ae2d74d5233dd4fabfb7a801d7c8
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|
wierd ini files. The ini files are still used as an intermediate step,
but a sophisticated python library exists to help build them more
easily.
SConscript:
add the new embedded file stuff
remove all of the old object description junk
base/inifile.cc:
base/inifile.hh:
get rid of findDefault and findAppend since they were the source
of much evil.
base/trace.cc:
For now, if we don't have the dprintf_stream set up, dump
to standard out. We probably want a command line option
for this.
dev/alpha_console.cc:
PioDevice now takes a platform parameter.
All PioDevices must have a pio_latency parameter. We stick
a dummy parameter in here for now until we get rid of the
builder stuff.
dev/alpha_console.hh:
don't need Platform anymore
dev/baddev.cc:
PioDevice now takes a platform parameter.
All PioDevices must have a pio_latency parameter. We stick
a dummy parameter in here for now until we get rid of the
builder stuff. Same for the platform parameter, though we just
pass the PioDevice a null parameter since it isn't used by
this device and it's quicker.
dev/baddev.hh:
fix #include guards
dev/etherlink.cc:
rename parameters.
dev/ethertap.cc:
rename parameters
dev/ide_ctrl.cc:
All devices need an address even if it will get overwritten later.
dev/ide_disk.cc:
use an enum for the drive ID stuff.
rename disk_delay -> delay
Actually, I think that we should implement "cable select" and
have the controller tell the drive what it is.
dev/io_device.cc:
dev/io_device.hh:
All IO devices take a Platform *
dev/ns_gige.cc:
all devices need an io_bus. rename header_bus to io_bus
We don't need stuff for the interrupt controller since
it's all in the platform now.
dev/ns_gige.hh:
We don't need stuff for the interrupt controller now since
it's all in the platform.
dev/pciconfigall.cc:
Pass a dummy NULL to the PioDevice for the platform since
we don't need one.
dev/pcidev.cc:
Move a bunch of common functionality into the PciDev
dev/platform.hh:
remove unneeded code
dev/tsunami.cc:
remove unused param
dev/tsunami_cchip.cc:
pass platform pointer
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
pass platform variable
dev/uart.hh:
don't need to keep a platform pointer. it's in the base class
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
rename some parameters
sim/builder.cc:
clean up builder code. use more parameters from the
config node. all sections with a type= are now created,
the old mechanisms no longer work
sim/builder.hh:
remove some extra variables since they are found in the ConfigNode
sim/main.cc:
add a quick hack command line argument -X to dump out the
embedded files. (probably should be fixed up a little.)
accept .mpy files
printing to the streams has to happen after the hierarchy
is built since we're moving away from param contexts
sim/param.cc:
add parsing support for ranges
sim/process.cc:
isValid isn't very useful anymore. interpret the names
stdout, stderr, cout, cerr for the file descriptors
sim/pyconfig/SConscript:
Add Action handlers for creating an embedded python file
and for creating an embedded C file.
use these action handlers to embed all objects found in the objects
tree into the binary along with the importer and the m5config stuff
sim/pyconfig/m5config.py:
Major changes to the original configuration file generator. These
changes largely involve implementing copy-on-write like semantics
for all of the SimObjects. Real documentation must be written.
sim/universe.cc:
Universe becomes a SimObject since we don't really have the notion of
param contexts in the python code.
--HG--
rename : sim/pyconfig/m5configbase.py => sim/pyconfig/m5config.py
extra : convert_revision : c353453e5beb91c37f15755998fc0d8858c6829a
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|
changes come from templated code,
which is evaluated slightly differently than in previous versions of gcc.
arch/alpha/alpha_linux_process.cc:
Alphabetize includes.
arch/alpha/vptr.hh:
Change the constants that are being used for alpha pagebytes to come from the ISA.
base/random.hh:
cpu/static_inst.cc:
sim/param.cc:
Fix up template syntax.
base/range.hh:
Include iostream for << operator.
base/res_list.hh:
base/statistics.hh:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.hh:
sim/eventq.hh:
sim/param.hh:
Fixup for templated code to resolve different scope lookup in gcc 3.4. This defers the lookup of the
function/variable until actual instantiation time by making it dependent on the templated class/function.
base/trace.cc:
Fix call to new.
base/trace.hh:
Fix up #define to have full path.
cpu/base_cpu.cc:
Fix up call to new.
dev/etherlink.hh:
dev/ns_gige.hh:
dev/sinic.hh:
Fixup for friend class/function declaration. g++ 3.4 no longer allows typedefs to be declared as
a friend class.
dev/pcidev.hh:
Fix up re-definition of access level to params.
kern/linux/linux_syscalls.hh:
kern/tru64/tru64_syscalls.hh:
Fix up header. Fix up template syntax.
sim/serialize.cc:
Include errno.h.
sim/startup.cc:
Change startupq. queue was getting destructed before all things had called ~StartupCallback(), which lead
to a segfault. This puts startupq in global space, and we allocate it ourselves. Other code may be similar
to this and may need changing in the future.
sim/syscall_emul.hh:
Include cpu/exec_context.hh and sim/process.hh, as forward declarations are no longer sufficient.
sim/universe.cc:
Include errno.h
--HG--
extra : convert_revision : e49d08ee89eb06a28351f02bafc028ca6652d5af
|
|
base/traceflags.py:
Merge extra new CPU flags
cpu/static_inst.hh:
Include all the execute functions in static_inst_impl.hh
--HG--
extra : convert_revision : 78eb753bf709d37400e7c2418bb35d842d7c3f63
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|
base/traceflags.py:
Add new commit rate trace flag.
build/SConstruct:
Add extra option for efence.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
Use function calls instead of direct indexing (avoids confusion).
cpu/beta_cpu/commit_impl.hh:
Add commit rate trace output (might not be worthwhile in the future).
cpu/beta_cpu/decode_impl.hh:
Remove some older hacks. Fix it so that the isntruction properly sets its next
PC to the one calculated by the branch.
cpu/beta_cpu/fetch_impl.hh:
Remove old commented code.
cpu/beta_cpu/iew_impl.hh:
Add extra check to ensure that the instruction is valid.
cpu/beta_cpu/regfile.hh:
Include trace file.
--HG--
extra : convert_revision : 4ee1dc88f8a5ed9b65486c6c111a3718a8040e42
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|
SConscript:
compile the random number generator stuff into m5
base/random.cc:
we need to define our destructor
base/random.hh:
Since there's no state, just makes all of these get functions static
--HG--
extra : convert_revision : 9d4b8abd57367391a8ecda3914b1d912d9c64185
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|
base/socket.cc:
Make panic print a more worthwhile message
dev/tsunami.hh:
Change max number of tsunami cpus to be 64
dev/tsunamireg.h:
Add new registers and register blocks for 64 cpu tsunami
--HG--
extra : convert_revision : 3ceaaa998518ded8613bc64edc04cb9120fd3d15
|
|
base/loader/ecoff_object.cc:
Only warn (not die) if we can't load symbols from an ecoff object.
sim/debug.cc:
Compile in functioning debug_break unless NDEBUG,
not only if DEBUG. Print warning if we hit breakpoint
when compiled with NDEBUG.
sim/debug.hh:
Compile in functioning debug_break unless NDEBUG,
not only if DEBUG.
--HG--
extra : convert_revision : baef2caac4a9c88e1389660823eaa7c42b1d19c8
|
|
base/loader/symtab.cc:
base/loader/symtab.hh:
Get rid of old unused calls.
cpu/simple_cpu/simple_cpu.hh:
No need to include base/loader/symtab.hh
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
Include base/loader/symtab.hh (since it's no longer included in system.hh)
sim/system.hh:
Replace include of base/loader/symtab.hh with forward class decl.
--HG--
extra : convert_revision : 3a778c2f409ec94e3b00eaa9b3859943cb39918c
|
|
base/inet.hh:
tcp/udp/ip checksums are calculated/manipulated in NBO always,
so there's no need to convert to host endian.
--HG--
extra : convert_revision : 13d6aff025a6c072d9d829c2e9fad4f13399b1f7
|
|
Simple text list of symbol (or address) and count
will be dumped to m5prof.<cpu-name> if the cpu's
pc_sample_interval param is set.
SConscript:
Add cpu/full_cpu/pc_sample_profile.cc
base/callback.hh:
Add a comment about MakeCallback.
Fix type in another comment.
base/loader/symtab.cc:
Revamp findNearestSymbol() to provide addresses of both
nearest symbols (preceding and following) as well as
string for former.
Move global definition of debugSymbolTable here too.
base/loader/symtab.hh:
Revamp findNearestSymbol() to provide addresses of both
nearest symbols (preceding and following) as well as
string for former.
Move global declaration of debugSymbolTable here too.
cpu/exetrace.cc:
Use new findNearestSymbol() interface for trace symbols.
kern/linux/linux_system.cc:
sim/system.cc:
Remove extern of debugSymbolTable (now in symtab.hh)
sim/process.cc:
Initialize debugSymbolTable if binary has a symbol table.
--HG--
extra : convert_revision : 0b5393dc39c40ac88c953684708f1125da550671
|
|
all macros in ev5.hh to inline functions or constant typed
variables and make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/ev5.cc:
arch/alpha/isa_desc:
dev/ns_gige.cc:
kern/tru64/tru64_events.cc:
deal with changes in ev5.hh
arch/alpha/ev5.hh:
Macros are nasty, so let's get rid of them. Convert all
all macros to inline functions or constant typed variables.
Make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/isa_traits.hh:
move some of the ev5 specific code into the isa
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
deal with isa addition
cpu/exec_context.hh:
be less isa specific and use the isa traits to figure out
what we can.
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
deal with changes in ev5.hh
I don't believe this masking is actually necessary. We should
look at removing it later.
dev/ide_ctrl.cc:
sort #includes
deal with changes in ev5.hh
--HG--
extra : convert_revision : c8a3adf0a4b1d198aefe38fc38b295abf289b08a
|
|
--HG--
extra : convert_revision : 2f470d122997fbc375f04e9c2682b6528adef50c
|
|
base/refcnt.hh:
reorganize the RefCountingPtr a little bit to make it easier
to derive from
dev/etherpkt.hh:
this doesn't belong here. use the inet.hh stuff
dev/ns_gige.cc:
dev/ns_gige.hh:
use newer features in the tcp/ip/ethernet stuff
--HG--
extra : convert_revision : 32c1953c95655c1f4c70e0d8adedfd94beead624
|
|
clean up a few other things while we're here.
base/bitfield.hh:
base/compression/null_compression.hh:
dont #include <inttypes.hh> use "sim/host.hh"
fix #include guard
base/stats/types.hh:
dont #include <inttypes.hh> use "sim/host.hh"
kern/linux/aligned.hh:
dont #include <stdint.hh> use "sim/host.hh"
fix #include guard
kern/linux/hwrpb.hh:
fix #include guard
--HG--
extra : convert_revision : 288c687a59a1e770bbb834879173e1a2ea371bce
|
|
functions instead of preprocessor macros.
arch/alpha/vtophys.cc:
use new constants, functions and structs to clean up the
vtophys code.
arch/alpha/vtophys.hh:
Clean up a little bit and make the protypes match new changes.
base/remote_gdb.cc:
dev/ide_disk.cc:
kern/tru64/tru64_events.cc:
use new constants from isa_traits.hh instead of ones from
old pmap.h
--HG--
extra : convert_revision : 5dce34e3b0c84ba72cefca34e5999b99898edcef
|
|
never clear about whether the end of the range was inclusive
or exclusive. Make it inclusive, but also provide a RangeSize()
function that will generate a Range based on a start and a size.
This, in combination with using the comparison operators, makes
almost all usages of the range not care how it is stored.
base/range.cc:
Make the end of the range inclusive.
start/end -> first/last
(end seems too much like end() in stl)
base/range.hh:
Make the end of the range inclusive.
Fix all comparison operators so that they work correctly with
an inclusive range. Also, when comparing one range to another
with <, <=, >, >=, we only look at the beginning of the range
beacuse x <= y should be the same as x < y || x == y. (This wasn't
the case before.)
Add a few functions for making a range:
RangeSize is start and size
RangeEx is start and end where end is exclusive
RangeIn is start and end where end is inclusive
start/end -> first/last
(end seems too much like end() in stl)
dev/alpha_console.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
Use the RangeSize function to create a range.
--HG--
extra : convert_revision : 29a7eb7fce745680f1c77fefff456c2144bc3994
|
|
arch/alpha/vtophys.cc:
PGOFSET -> ALPHA_PGOFSET to avoid include file problems
base/callback.hh:
Added a class to create a callback from a function
base/intmath.hh:
make FloorLog2 inlined
dev/pcidev.cc:
more work in getting pciconfig space happy with different endiannesses
dev/uart.cc:
used an incorrect size for write uint64_t instead of uint8_t
sim/system.cc:
when writing things into system data structures we need to pay
attention to endianness
--HG--
extra : convert_revision : 52f441b5789c45db30ef2f6fd4975cbc7323a381
|
|
base/inet.cc:
we can't use a uint16_t for the intermediate checksum values
since there may be some bits that carry.
the length that is added in the pseudo header is the length of
the tcp portion only.
base/inet.hh:
silly me, the ip_hlen field is in terms of 4-byte words.
when caclulating checksum, we're dealing with network byte order,
so don't bother doing any byteswapping.
--HG--
extra : convert_revision : 993e3413e9febea0ba2fb6ba8bf04c053cca15ed
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|
Also change to ref counted DynInst.
SConscript:
Add branch predictor, BTB, load store queue, and storesets.
arch/isa_parser.py:
Specify the template parameter for AlphaDynInst
base/traceflags.py:
Add load store queue, store set, and mem dependence unit to the
list of trace flags.
cpu/base_dyn_inst.cc:
Change formating, add in debug statement.
cpu/base_dyn_inst.hh:
Change DynInst to be RefCounted, add flag to clear whether or not this
instruction can commit. This is likely to be removed in the future.
cpu/beta_cpu/alpha_dyn_inst.cc:
AlphaDynInst has been changed to be templated, so now this CC file
is just used to force instantiations of AlphaDynInst.
cpu/beta_cpu/alpha_dyn_inst.hh:
Changed AlphaDynInst to be templated on Impl. Removed some unnecessary
functions.
cpu/beta_cpu/alpha_full_cpu.cc:
AlphaFullCPU has been changed to be templated, so this CC file is now
just used to force instantation of AlphaFullCPU.
cpu/beta_cpu/alpha_full_cpu.hh:
Change AlphaFullCPU to be templated on Impl.
cpu/beta_cpu/alpha_impl.hh:
Update it to reflect AlphaDynInst and AlphaFullCPU being templated
on Impl. Also removed time buffers from here, as they are really
a part of the CPU and are thus in the CPU policy now.
cpu/beta_cpu/alpha_params.hh:
Make AlphaSimpleParams inherit from the BaseFullCPU so that it doesn't
need to specifically declare any parameters that are already in the
BaseFullCPU.
cpu/beta_cpu/comm.hh:
Changed the structure of the time buffer communication structs. Now
they include the size of the packet of instructions it is sending.
Added some parameters to the backwards communication struct, mainly
for squashing.
cpu/beta_cpu/commit.hh:
Update typenames to reflect change in location of time buffer structs.
Update DynInst to DynInstPtr (it is refcounted now).
cpu/beta_cpu/commit_impl.hh:
Formatting changes mainly. Also sends back proper information
on branch mispredicts so that the bpred unit can update itself.
Updated behavior for non-speculative instructions (stores, any
other non-spec instructions): once they reach the head of the ROB,
the ROB signals back to the IQ that it can go ahead and issue the
non-speculative instruction. The instruction itself is updated so that
commit won't try to commit it again until it is done executing.
cpu/beta_cpu/cpu_policy.hh:
Added branch prediction unit, mem dependence prediction unit, load
store queue. Moved time buffer structs from AlphaSimpleImpl to here.
cpu/beta_cpu/decode.hh:
Changed typedefs to reflect change in location of time buffer structs
and also the change from DynInst to ref counted DynInstPtr.
cpu/beta_cpu/decode_impl.hh:
Continues to buffer instructions even while unblocking now. Changed
how it loops through groups of instructions so it can properly block
during the middle of a group of instructions.
cpu/beta_cpu/fetch.hh:
Changed typedefs to reflect change in location of time buffer structs
and the change to ref counted DynInsts. Also added in branch
brediction unit.
cpu/beta_cpu/fetch_impl.hh:
Add in branch prediction. Changed how fetch checks inputs and its
current state to make for easier logic.
cpu/beta_cpu/free_list.cc:
Changed int regs and float regs to logically use one flat namespace.
Future change will be moving them to a single scoreboard to conserve
space.
cpu/beta_cpu/free_list.hh:
Mostly debugging statements. Might be removed for performance in future.
cpu/beta_cpu/full_cpu.cc:
Added in some debugging statements. Updated BaseFullCPU to take
a params object.
cpu/beta_cpu/full_cpu.hh:
Added params class within BaseCPU that other param classes will be
able to inherit from. Updated typedefs to reflect change in location
of time buffer structs and ref counted DynInst.
cpu/beta_cpu/iew.hh:
Updated typedefs to reflect change in location of time buffer structs
and use of ref counted DynInsts.
cpu/beta_cpu/iew_impl.hh:
Added in load store queue, updated iew to be able to execute non-
speculative instructions, instead of having them execute in commit.
cpu/beta_cpu/inst_queue.hh:
Updated change to ref counted DynInsts. Changed inst queue to hold
non-speculative instructions as well, which are issued only when
commit signals backwards that a nonspeculative instruction is at
the head of the ROB.
cpu/beta_cpu/inst_queue_impl.hh:
Updated to allow for non-speculative instructions to be in the inst
queue. Also added some debug functions.
cpu/beta_cpu/regfile.hh:
Added debugging statements, changed formatting.
cpu/beta_cpu/rename.hh:
Updated typedefs, added some functions to clean up code.
cpu/beta_cpu/rename_impl.hh:
Moved some code into functions to make it easier to read.
cpu/beta_cpu/rename_map.cc:
Changed int and float reg behavior to use a single flat namespace. In
the future, the rename maps can be combined to a single rename map to
save space.
cpu/beta_cpu/rename_map.hh:
Added destructor.
cpu/beta_cpu/rob.hh:
Updated it with change from DynInst to ref counted DynInst.
cpu/beta_cpu/rob_impl.hh:
Formatting, updated to use ref counted DynInst.
cpu/static_inst.hh:
Updated forward declaration for AlphaDynInst now that it is templated.
--HG--
extra : convert_revision : 1045f240ee9b6a4bd368e1806aca029ebbdc6dd3
|
|
base/inet.hh:
add functions to the various headers to grab the most common
encapsulated protocols. This could easily get out of hand, but
we're just worrying about tcp, udp, and ip for now.
add common functions size(), bytes(), and payload() to all wrappers.
size() gets the header size
bytes() returns a uint8_t * to the beginning of the header
payload() returns a uint8_t * to the beginning of the payload.
dev/etherpkt.cc:
dev/etherpkt.hh:
don't cache pointers to headers. It's probably not worth the
hassle.
--HG--
extra : convert_revision : ba9df85ac019b8a48233042dde79fb9da9546410
|
|
libdnet when we can instead of our own home grown stuff.
SConscript:
separate the crc code into its own file
base/inet.cc:
move the crc stuff to crc.cc
add generic code for calculating ip/tcp/udp checksums
base/inet.hh:
- move crc stuff to crc.hh
- #include all of the libdnet stuff. (this makes base/inet.hh the
only file you need to include if you want to use this kind of stuff.)
- Wrap some of the libdnet structs to get easier access to structure
members. These wrappers will automatically deal with masking/shifting/
byte-swapping.
base/refcnt.hh:
If one derives from RefCountingPtr, they should have access to
the internal data pointer.
build/SConstruct:
make #include of dnet stuff work
dev/etherlink.cc:
dev/ethertap.cc:
dev/ethertap.hh:
EtherPacket -> PacketData
dev/etherpkt.cc:
EtherPacket -> PacketData
add a function for populating extra info about a packet.
Basically just gives pointers to ethernet/ip/tcp/udp headers
if they exist.
dev/etherpkt.hh:
EtherPacket -> PacketData
remove most of the packet header stuff from teh PacketData
class and just add a few generic functions for grabbing various
headers that may exist in the packet. The old functionality is
contained in the headers.
dev/ns_gige.cc:
- IP -> Ip, UDP -> Udp, TCP ->Tcp when used in variable names
- get rid of our own byte swapping functions.
- whack checksum code and use libdnet version.
- Get pointers to the various packet headers and grab info from
those headers. (The byte swapping in the headers now.)
- Add stats for Udp Checksums
dev/ns_gige.hh:
use libdnet for checksum code.
IP -> Ip, TCP -> Tcp in variable names
add stats for UDP checksums
--HG--
extra : convert_revision : 96c4160e1967b7c0090acd456df4a76e1f3aab53
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caches.
SConscript:
Added new CPU files to build.
arch/alpha/isa_desc:
Changed rduniq and wruniq to be nonspeculative because the uniq register is not renamed.
arch/isa_parser.py:
Added new CPU exec method.
base/statistics.hh:
Minor change for namespace conflict. Probably can change back one the new CPU files are cleaned up.
base/traceflags.py:
Added new CPU trace flags.
cpu/static_inst.hh:
Changed static inst to use a file that defines the execute functions.
--HG--
extra : convert_revision : bd4ce34361308280168324817fc1258dd253e519
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