gem5 - gem5

Age	Commit message (Collapse)	Author
2011-02-23	configs: cache: add cache line size option	Korey Sewell

2011-02-23	configs: set default cache params	Korey Sewell
	It's confusing (especially to new users), when you are setting some standard parameters (as defined in Options.py) and they aren't reflected in the simulations so we might as well link the settings in CacheConfig.py to those in Options.py
2011-02-03	Config: Keep track of uncached and cached ports separately.	Gabe Black
	This makes sure that the address ranges requested for caches and uncached ports don't conflict with each other, and that accesses which are always uncached (message signaled interrupts for instance) don't waste time passing through caches.
2011-02-01	X86: Add L1 caches for the TLB walkers.	Gabe Black
	Small L1 caches are connected to the TLB walkers when caches are used. This allows them to participate in the coherence protocol properly.
2010-02-25	configs: pull out cache configuration code from se.py and fs.py.	Lisa Hsu
	Most of these frontend configurations share cache configuration code, pull it out so that changes to caches don't have to require changing multiple config files.