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path: root/configs/common/MemConfig.py
AgeCommit message (Expand)Author
2017-02-14mem: Update DRAM configuration namesWendy Elsasser
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10]Christian Menard
2016-07-01mem: different HMC configurationAbdul Mutaal Ahmad
2015-12-07config: Enable elastic trace capture and replay in se/fsRadhika Jagtap
2015-11-03mem: hmc: top level designErfan Azarkhish
2015-08-03misc: Coupling gem5 with SystemC TLM2.0Matthias Jung
2015-04-20config: Remove memory aliases and rely on class nameAndreas Hansson
2015-04-08config: Support full-system with SST's memory systemCurtis Dunham
2015-02-03config: Add XOR hashing to the DRAM channel interleavingAndreas Hansson
2015-02-03config: Adjust DRAM channel interleaving defaultsAndreas Hansson
2014-12-23config: Expose the DRAM ranks as a command-line optionAndreas Hansson
2014-11-06ruby: interface with classic memory controllerNilay Vaish
2014-10-11config: separate function for instantiating a memory controllerNilay Vaish
2014-03-23mem: Rename SimpleDRAM to a more suitable DRAMCtrlAndreas Hansson
2014-03-23mem: More descriptive address-mapping scheme namesAndreas Hansson
2014-02-18mem: Add a wrapped DRAMSim2 memory controllerAndreas Hansson
2014-01-27config: allow more than 3GB of memory for x86 simulationsNilay Vaish
2013-08-19config: Command line support for multi-channel memoryAndreas Hansson
2013-05-30mem: More descriptive DRAM config namesAndreas Hansson
2013-05-30mem: Add a LPDDR3-1600 configurationAndreas Hansson
2013-04-22config: Add a mem-type config option to se/fs scriptsAndreas Hansson