gem5 - gem5

Age	Commit message (Expand)	Author
2017-02-14	mem: Update DRAM configuration names	Wendy Elsasser
2017-02-09	misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10]	Christian Menard
2016-07-01	mem: different HMC configuration	Abdul Mutaal Ahmad
2015-12-07	config: Enable elastic trace capture and replay in se/fs	Radhika Jagtap
2015-11-03	mem: hmc: top level design	Erfan Azarkhish
2015-08-03	misc: Coupling gem5 with SystemC TLM2.0	Matthias Jung
2015-04-20	config: Remove memory aliases and rely on class name	Andreas Hansson
2015-04-08	config: Support full-system with SST's memory system	Curtis Dunham
2015-02-03	config: Add XOR hashing to the DRAM channel interleaving	Andreas Hansson
2015-02-03	config: Adjust DRAM channel interleaving defaults	Andreas Hansson
2014-12-23	config: Expose the DRAM ranks as a command-line option	Andreas Hansson
2014-11-06	ruby: interface with classic memory controller	Nilay Vaish
2014-10-11	config: separate function for instantiating a memory controller	Nilay Vaish
2014-03-23	mem: Rename SimpleDRAM to a more suitable DRAMCtrl	Andreas Hansson
2014-03-23	mem: More descriptive address-mapping scheme names	Andreas Hansson
2014-02-18	mem: Add a wrapped DRAMSim2 memory controller	Andreas Hansson
2014-01-27	config: allow more than 3GB of memory for x86 simulations	Nilay Vaish
2013-08-19	config: Command line support for multi-channel memory	Andreas Hansson
2013-05-30	mem: More descriptive DRAM config names	Andreas Hansson
2013-05-30	mem: Add a LPDDR3-1600 configuration	Andreas Hansson
2013-04-22	config: Add a mem-type config option to se/fs scripts	Andreas Hansson