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path: root/configs/common/Simulation.py
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2012-11-02python: Rename doDrain()->drain() and make it do the right thingAndreas Sandberg
There is no point in exporting the old drain() method in Simulate.py. It should only be used internally by doDrain(). This patch moves the old drain() method into doDrain() and renames doDrain() to drain().
2012-11-02Partly revert [4f54b0f229b5] and move draining to m5.changeToTimingAndreas Sandberg
Changeset 4f54b0f229b5 removed the call to doDrain in changeToTiming based on the assumption that the system does not need draining when running in atomic mode. This is a false assumption since at least the System class requires the system to be drained before it allows switching of memory modes. This patch reverts that part of the changeset.
2012-09-12Standard Switch: Drain the system before switching CPUsJoel Hestness
When switching from an atomic CPU to any of the timing CPUs, a drain is unnecessary since no events are scheduled in atomic mode. However, when trying to switch CPUs starting with a timing CPU, there may be events scheduled. This change ensures that all events are drained from the system by calling m5.drain before switching CPUs.
2012-09-11Checkpoint: Pass maxtick to avoid undefined variableAndreas Hansson
This patch fixes a bug in scriptCheckpoints, where maxtick was used undefined. The bug caused checkpointing by means of --take-checkpoints to fail.
2012-08-21Checkpoint: Fix broken checkpointing functionalityAndreas Hansson
This patch fixes the checkpointing by ensuring that the directory is passer to the scriptCheckpoints function, and that the num_checkpoints is not used before it is initialised.
2012-08-15configs: add option for repeatedly switching back-and-forth between cpu types.Anthony Gutierrez
This patch adds a --repeat-switch option that will enable repeat core switching at a user defined period (set with --switch-freq option). currently, a switch can only occur between like CPU types. inorder CPU switching is not supported. *note* this patch simply allows a config that will perform repeat switching, it does not fix drain/switchout functionality. if you run with repeat switching you will hit assertion failures and/or your workload with hang or die.
2012-08-06Simulation.py: move code related to checkpointing to functionsNilay Vaish
This patch moves the code related to checkpointing from the run() function to several different functions. The aim is to make the code more manageable. No functionality changes are expected, but since the code is kind of unruly, it is possible that some change might have creeped in.
2012-08-06Config: change how cpu class is setNilay Vaish
This changes the way in which the cpu class while restoring from a checkpoint is set. Earlier it was assumed if cpu type with which to restore is not same as the cpu type with the which to run the simulation, then the checkpoint should be restored with the atomic cpu. This assumption is being dropped. The checkpoint can now be restored with any cpu type, the default being atomic cpu.
2012-07-23Config: Use clock option in se/fs script and pass to switch_cpusAndreas Hansson
This patch changes the se and fs script to use the clock option and not simply set the CPUs clock to 2 GHz. It also makes a minor change to the assignment of the switch_cpus clock to allow different clocks.
2012-03-27Config: Move setWorkCountOptions() to Simulation.pyNilay Vaish
The function is presently defined in FSConfig.py, which does not seem to be the correct place for it.
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
Enables the CheckerCPU to be selected at runtime with the --checker option from the configs/example/fs.py and configs/example/se.py configuration files. Also merges with the SE/FS changes.
2012-01-28SE/FS: Get rid of FULL_SYSTEM in the configs directoryGabe Black
2012-01-26configs: A more realistic configuration of an ARM-like processorRonald Dreslinski
2012-01-23Config: Enable using O3 CPU and Ruby in SE modeNilay Vaish
2012-01-11Config: Add support for restoring using a timing CPUNilay Vaish
Currently there is an assumption that restoration from a checkpoint will happen by first restoring to an atomic CPU and then switching to a timing CPU. This patch adds support for directly restoring to a timing CPU. It adds a new option '--restore-with-cpu' which is used to specify the type of CPU to which the checkpoint should be restored to. It defaults to 'atomic' which was the case before.
2012-01-05Config: Add an option of type 'choice' for cpu typeNilay Vaish
This patch adds a new option for cpu type. This option is of type 'choice' which is similar to a C++ enum, except that it takes string values as possible choices. Following options are being removed -- detailed, timing, inorder. --HG-- extra : rebase_source : 58885e2e8a88b6af8e6ff884a5922059dbb1a6cb
2011-05-23configs: missed spot progress-interval changeKorey Sewell
2011-05-20configs: cleanup redundant/unused optionsKorey Sewell
maxinsts & max_inst redundant prog_intvl and profile seem redundant, but profile looks to be unused add -p option for progress intervals
2011-04-04Sim: Fix Simulation.py to allow more than 1 core for standard switching.Anthony Gutierrez
This patch moves the assignment of testsys.switch_cpus, testsys.switch_cpus_1, switch_cpu_list, and switch_cpu_list1 outside of the for loop so they are assigned only once, after switch_cpus and switch_cpus_1 are constructed.
2010-11-17Config: Change misleading "cycle" message to say "tick".Gabe Black
Most of the messages in the config scripts that report a time value already print "@ tick" followed by the current tick value, but a few were printing "@ cycle". Since this is a distinction that's frequently confusing to new users, this changes those message to the more accurate and consistent "@ tick".
2010-08-17misc: add some AMD copyright noticesSteve Reinhardt
Meant to add these with the previous batch of csets.
2010-08-17sim: fold checkpoint restore code into instantiate()Steve Reinhardt
The separate restoreCheckpoint() call is gone; just pass the checkpoint dir as an optional arg to instantiate(). This change is a precursor to some more extensive reworking of the startup code.
2010-08-17configs: clean up checkpoint code in Simulation.pySteve Reinhardt
Small change to clean up some redundant code. Should not have any functional impact.
2010-08-17sim: make Python Root object a singletonSteve Reinhardt
Enforce that the Python Root SimObject is instantiated only once. The C++ Root object already panics if more than one is created. This change avoids the need to track what the root object is, since it's available from Root.getInstance() (if it exists). It's now redundant to have the user pass the root object to functions like instantiate(), checkpoint(), and restoreCheckpoint(), so that arg is gone. Users who use configs/common/Simulate.py should not notice.
2010-07-05util: add a script for testing checkpointingSteve Reinhardt
See comments in util/checkpoint-tester.py for details.
2009-11-18m5: Added option to take a checkpoint at the end of simulationBrad Beckmann
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
2009-09-16configs: add maxinsts option on command lineKorey Sewell
-option to allow threads to run to a max_inst_any_thread which is more useful/quicker in a lot of cases then always having to figure out what tick to run your simulation to.
2009-05-05cpus: fix cpu progress eventKorey Sewell
this was double scheduling itself (once in constructor and once in cpu code). also add support for stopping / starting progress events through repeatEvent flag and also changing the interval of the progress event as well
2009-04-21Minor tweaks for future Ruby compatibility.Steve Reinhardt
2009-02-10Configs: Add support for the InOrder CPU modelKorey Sewell
2009-01-30Errors: Print a URL with a hash of the format string to find more ↵Ali Saidi
information about an error.
2008-03-15Simpoints: Fix regression bug/Don't set process.simpoint, if simpoint ↵Ali Saidi
doesn't exist --HG-- extra : convert_revision : c156c49668815755c4c788f807e8eba32151aa24
2008-02-29Error out if -s is used without --caches (instead of saying you must specify aLisa Hsu
CPU). --HG-- extra : convert_revision : a3b2bfbe7e037146ac08dd08834bf255da692506
2008-02-29Configs: Make sure options don't conflictAli Saidi
--HG-- extra : convert_revision : dc9b91cf1d8e33c5e68d7faeb45dbe3e7038d14c
2008-02-28Configs: Fix some bugs we introduced in the simpoints codeAli Saidi
--HG-- extra : convert_revision : ef22c11cb3242903a484fc05dc0f96d3e5f9af72
2008-02-27Configs: Make using Simpoints easier with some config files that support ↵Rick Strong
them easily --HG-- extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd
2008-02-22add instruction count fast forwaing and max instruction optionsVilas Sridharan
--HG-- extra : convert_revision : 8fe45e512229cdc3e0dcd23e3e5c54516c445d0f
2008-02-14Configs: Change Simulation.py to return a subclass of the CPU models rather ↵Ali Saidi
than the original class. Without this changes elsewhere in the config script (e.g. the DriveSys frequency can change the TestSys frequency. --HG-- extra : convert_revision : f972207c616590a60a6e103daa5de469cf124b44
2007-12-18Checkpointing: Fix a bug in the simulation script when restoring without ↵Ali Saidi
standard switch and change some ifs to work with the default port since every port is now connected to something. --HG-- extra : convert_revision : 72507cf13e58465291b0dce6322e853bee5a2b89
2007-11-03Checkpoint: Use checkpoint_dir, if that is not set use outdir (-d), and if ↵Ali Saidi
that isn't set use cwd. --HG-- extra : convert_revision : 6548dd6de376dd59285a37a03bcf2525f8fc3845
2007-10-25Checkpoints: Change Simulation.py to not go crazy if the simulation ends ↵Ali Saidi
before the number of checkpoints requested are created. --HG-- extra : convert_revision : 865179134a219b34dbbba698e1fa0da7c452e074
2007-09-12Checkpointing: Fix directory regexAli Saidi
--HG-- extra : convert_revision : 4d3958eda66209373249e54e7deadd1a7442e828
2007-09-12Checkpointing: Force drain/resume when switching a CPUAli Saidi
--HG-- extra : convert_revision : 7d9c3f4c8c357e3a9214deba5df3581beeaf7cb6
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
directly configured by python. Move stuff from root.(cc|hh) to core.(cc|hh) since it really belogs there now. In the process, simplify how ticks are used in the python code. --HG-- extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
2007-01-30fix some checkpointing annoyancesAli Saidi
-m works as you think it should Ctrl-C actually ends the simulation now --HG-- extra : convert_revision : f2269dc90d165c716459ec61f5f7b1ea3c1d4ae2
2006-11-26Include check for making sure caches are enabled.Kevin Lim
--HG-- extra : convert_revision : e3902b065db524ebe5bf762e44a840133ccb8d75
2006-11-09Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : dafe2d4a032b277c219ea13faf20567c20c1f2f4
2006-11-09Clean up config scripts to not have to worry about attaching a cache only to ↵Kevin Lim
the TimingCPU. Now the Atomic CPU works with caches. configs/common/Simulation.py: Atomic CPU now works properly with caches, so we don't have to do extra parsing to hook up caches only to the timing CPU. However the O3CPU must always use caches, so a check for that must still exist. Also change the switch_cpus to be placed at the system level, now that Steve changed how the IntrController gets its CPU. configs/example/fs.py: configs/example/se.py: Atomic CPU now handles caches. --HG-- extra : convert_revision : 534ded558ef96cafd76b4b5c5317bd8f4d05076e
2006-11-08simplify maxtick parsing in both the python and the c++.Lisa Hsu
configs/common/Simulation.py: simplify maxtick code a little bit - instead of checking for -1, just set it at MaxTick. src/python/m5/__init__.py: make a new m5 param called MaxTick. src/sim/host.hh: fix the M5 def. of MaxTick src/sim/main.cc: Simplify the MaxTick/num_cycles parsing within main.cc --HG-- extra : convert_revision : f800addfbc1323591c2e05b892276b439b671668
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