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path: root/configs/common
AgeCommit message (Expand)Author
2012-03-01ARM: Add support for Versatile Express extended memory mapAli Saidi
2012-03-01x86: Fix switching of CPUsNilay Vaish
2012-03-01Config: make option ruby available alwaysNilay Vaish
2012-02-26Make the IO bridge accept address headed to all the local APICs.Gabe Black
2012-02-14Script: Fix the scripts that use the num_cpus cache parameterAndreas Hansson
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-02-12configs: fix minor config bugs posted on the mailing listAli Saidi
2012-02-12prefetcher: Make prefetcher a sim object instead of it being a parameter on c...Mrinmoy Ghosh
2012-02-05X86: Rename the bridge which allows commnication back to the local APICs.Gabe Black
2012-01-28SE/FS: Get rid of FULL_SYSTEM in the configs directoryGabe Black
2012-01-28SE/FS: Make SE vs. FS mode a runtime parameter.Gabe Black
2012-01-26configs: actually add ARMv7a-like cpu/cache fileRonald Dreslinski
2012-01-26configs: A more realistic configuration of an ARM-like processorRonald Dreslinski
2012-01-23Config: Enable using O3 CPU and Ruby in SE modeNilay Vaish
2012-01-17MEM: Removing the default port peer from Python portsAndreas Hansson
2012-01-17MEM: Make the bus bridge unidirectional and fixed address rangeAndreas Hansson
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2012-01-11Config: Add support for restoring using a timing CPUNilay Vaish
2012-01-10Config: Remove short option string for cpu typeNilay Vaish
2012-01-09ARM: Add support for running multiple systemsAli Saidi
2012-01-09ARM: Add support for initparam m5 opAli Saidi
2012-01-09cpu2000: Add missing art benchmark to allAli Saidi
2012-01-05Config: Add an option of type 'choice' for cpu typeNilay Vaish
2011-12-15ARM: Update config files for Android/BBench images available on website.Anthony Gutierrez
2011-12-01O3: Remove hardcoded tgts_per_mshr in O3CPU.py.Chander Sudanthi
2011-10-19ARM: Fix small bug in config script that prevents android from bootingAli Saidi
2011-08-19ARM: Add some MP regressions and clean up the disk images and kernels a bitAli Saidi
2011-08-19ARM: Add VExpress_E support with PCIe to gem5Ali Saidi
2011-08-19ARM: Add support for Versatile Express boardsAli Saidi
2011-05-23config: revamp x86 config to avoid appending to SimObjectVectorsSteve Reinhardt
2011-05-23configs: missed spot progress-interval changeKorey Sewell
2011-05-20configs: cleanup redundant/unused optionsKorey Sewell
2011-05-04ARM: Configure bootloader parametersAli Saidi
2011-04-20python: fix another bug from changes to main.pyNathan Binkert
2011-04-04ARM: Include IDE/CF controller by default in PBX model.Ali Saidi
2011-04-04Sim: Fix Simulation.py to allow more than 1 core for standard switching.Anthony Gutierrez
2011-03-17ARM: Bare metal system should have 256MB of RAM.Ali Saidi
2011-03-17Mem: Fix issue with dirty block being lost when entire block transferred to n...Ali Saidi
2011-02-24Configs: Explicitly import env in Benchmarks.pyGabe Black
2011-02-23ARM: Clarifies creation of Linux and baremetal ARM systems.Ali Saidi
2011-02-23configs: cache: add cache line size optionKorey Sewell
2011-02-23configs: set default cache paramsKorey Sewell
2011-02-11VNC: Add VNC server to M5Ali Saidi
2011-02-08config: fixed minor bug connecting dma devices to rubyBrad Beckmann
2011-02-07X86, Config: Move the setting of work count options to a separate function.Gabe Black
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-02-06ruby: x86 fs config supportBrad Beckmann
2011-02-03Config: Keep track of uncached and cached ports separately.Gabe Black
2011-02-02X86: Change how the default disk image gets set up.Gabe Black
2011-02-01X86: Add L1 caches for the TLB walkers.Gabe Black