Age | Commit message (Expand) | Author |
2007-11-16 | compile-time fix for setMipsOptions function | Korey Sewell |
2007-11-15 | add setMipsOptions function for MIPS usage | Korey Sewell |
2007-11-13 | Add in files from merge-bare-iron, get them compiling in FS and SE mode | Korey Sewell |
2007-11-03 | Checkpoint: Use checkpoint_dir, if that is not set use outdir (-d), and if th... | Ali Saidi |
2007-10-25 | Checkpoints: Change Simulation.py to not go crazy if the simulation ends befo... | Ali Saidi |
2007-10-07 | X86: Adjust the config scripts for x86 fs. | Gabe Black |
2007-09-12 | Checkpointing: Fix directory regex | Ali Saidi |
2007-09-12 | Checkpointing: Force drain/resume when switching a CPU | Ali Saidi |
2007-08-16 | PCI: Move PCI Configuration data into devices now that we can inherit paramet... | Ali Saidi |
2007-08-16 | Devices: Make EtherInts connect in the same way memory ports currently do. | Ali Saidi |
2007-08-12 | Regression: fix configuration for SPARC_FS | Ali Saidi |
2007-08-08 | Added fastmem option. | Vincentius Robby |
2007-08-10 | DMA: Add IOCache and fix bus bridge to optionally only send requests one | Ali Saidi |
2007-06-30 | Get rid of remaining traces of obsolete CoherenceProtocol object. | Steve Reinhardt |
2007-06-10 | the cmd argument is supposed to be an array of parameters, not one string | Nathan Binkert |
2007-06-04 | fix SPARC.... | Ali Saidi |
2007-05-27 | Move SimObject python files alongside the C++ and fix | Nathan Binkert |
2007-05-15 | add an l2 cache option to se example config | Ali Saidi |
2007-05-10 | remove hit_latency and make latency do the right thing | Ali Saidi |
2007-05-07 | fix partial writes with a functional memory hack | Ali Saidi |
2007-04-30 | add a udp stream benchmark and a udp loopback benchmark | Ali Saidi |
2007-03-22 | Fix mcf benchmark object so it gets the arguments it expects. | Gabe Black |
2007-03-06 | Move all of the parameters of the Root SimObject so they are | Nathan Binkert |
2007-03-03 | Merge zizzer:/bk/newmem | Ali Saidi |
2007-03-03 | Add Iob and remove the fake device | Ali Saidi |
2007-03-03 | Implement Niagara I/O interface and rework interrupts | Ali Saidi |
2007-03-03 | Keep around which input set was used for a benchmark, and make vortex work wi... | Gabe Black |
2007-02-21 | Get rid of the ConsoleListener SimObject and just fold the | Nathan Binkert |
2007-01-30 | fix some checkpointing annoyances | Ali Saidi |
2007-01-09 | add memory mapped disk device | Ali Saidi |
2006-12-06 | Many more fixes for SPARC_FS. Gets us to the point where SOFTINT starts | Ali Saidi |
2006-12-04 | More changes to get SPARC fs closer. Now at 1.2M cycles before difference | Ali Saidi |
2006-11-30 | Load the hypervisor symbols twice, once with an address mask so that we can g... | Ali Saidi |
2006-11-29 | Merge zizzer:/bk/sparcfs | Gabe Black |
2006-11-26 | Include check for making sure caches are enabled. | Kevin Lim |
2006-11-22 | Added a parameter to set memory to zero. This is to support Legion, and once ... | Gabe Black |
2006-11-22 | Merge zizzer:/bk/sparcfs | Gabe Black |
2006-11-20 | Add in rom/rams for the nvram, hypervisor description, and partition descript... | Gabe Black |
2006-11-16 | Implement a single config file to encompass all of the SPEC | Nathan Binkert |
2006-11-16 | Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemops | Gabe Black |
2006-11-16 | Fixes for SPARC_FS | Gabe Black |
2006-11-15 | Add L2 cache option to fs.py --l2cache | Ron Dreslinski |
2006-11-10 | Merge ktlim@zizzer:/bk/newmem | Kevin Lim |
2006-11-09 | Get SPARC to the point that it starts running. Add ability to load the ROM bi... | Ali Saidi |
2006-11-09 | Merge ktlim@zizzer:/bk/newmem | Kevin Lim |
2006-11-09 | Clean up config scripts to not have to worry about attaching a cache only to ... | Kevin Lim |
2006-11-08 | simplify maxtick parsing in both the python and the c++. | Lisa Hsu |
2006-11-08 | make rcS files read from the m5 source directory, not /dist. | Lisa Hsu |
2006-11-08 | change to os.path.join like nate wanted. | Lisa Hsu |
2006-11-01 | factor some more commone code and enable going from checkpoint into arbitrary... | Lisa Hsu |