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path: root/configs/example/fs.py
AgeCommit message (Expand)Author
2012-01-09ARM: Add support for running multiple systemsAli Saidi
2012-01-09ARM: Add support for initparam m5 opAli Saidi
2011-12-01VNC: Add support for capturing frame buffer to file each time it is changed.Chris Emmons
2011-06-17ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA.Gedare Bloom
2011-02-23ARM: Clarifies creation of Linux and baremetal ARM systems.Ali Saidi
2011-02-07X86, Config: Move the setting of work count options to a separate function.Gabe Black
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-02-03Mem,X86: Make the IO bridge pass APIC messages back towards the CPU.Gabe Black
2011-02-03Config: Keep track of uncached and cached ports separately.Gabe Black
2011-01-19Time: Add a mechanism to prevent M5 from running faster than real time.Gabe Black
2010-08-23ARM: Add configuration for Linux/Full SystemAli Saidi
2010-02-27Config: Fix fs.py's call to CacheConfig.config_cache.Gabe Black
2010-02-25configs: pull out cache configuration code from se.py and fs.py.Lisa Hsu
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
2009-09-14Add an I/O cache to FS config even if there's just an "L2" cache.Steve Reinhardt
2009-04-26X86, Config: Make makeX86System consider the number of CPUs, and clean up int...Gabe Black
2008-07-16mem: use single BadAddr responder per system.Steve Reinhardt
2009-01-30Errors: Print a URL with a hash of the format string to find more information...Ali Saidi
2008-06-13Scripts: Check for the appropriate build type as soon as possible.Ali Saidi
2007-12-01X86: Move startup code to the system object to initialize a Linux system.Gabe Black
2007-11-15fix MIPS headersKorey Sewell
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
2007-10-08Configuration: Move iocache outside of processors loop so it works for MP sys...Ali Saidi
2007-10-07X86: Adjust the config scripts for x86 fs.Gabe Black
2007-08-08Added fastmem option.Vincentius Robby
2007-08-10DMA: Add IOCache and fix bus bridge to optionally only send requests oneAli Saidi
2007-08-01Configuration: Update the drive systems kernel as well as the testsys kernel ...Ali Saidi
2007-05-15add an l2 cache option to se example configAli Saidi
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
2007-01-03Merge zizzer:/bk/newmemGabe Black
2006-12-22Add options for setting the kernel to run and theNathan Binkert
2006-12-04automatically build sparc system or alpha system.Lisa Hsu
2006-11-15Add L2 cache option to fs.py --l2cacheRon Dreslinski
2006-11-09Clean up config scripts to not have to worry about attaching a cache only to ...Kevin Lim
2006-11-01factor some more commone code and enable going from checkpoint into arbitrary...Lisa Hsu
2006-10-31Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-31Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...Kevin Lim
2006-10-30se.py, fs.py:Lisa Hsu
2006-10-30Use some python os.path stuff to make it more flexible where we can execute t...Kevin Lim
2006-10-27factor out common run code from se.py and fs.py.Lisa Hsu
2006-10-24Fix fs.py. Lisa did you test this? Is there some wierd python version thing?Ali Saidi
2006-10-23warmup of 1B cpu cycles.Lisa Hsu
2006-10-23Merge zizzer:/bk/newmemLisa Hsu
2006-10-23changes regarding fs.pyLisa Hsu
2006-10-19First cut at LL/SC support in caches (atomic mode only).Steve Reinhardt
2006-10-17Add --caches option to add caches to server CPUs.Steve Reinhardt
2006-10-17Enable MP systems via cmd-line flag in fs.py.Steve Reinhardt
2006-10-17Rename 'Machine' to 'SysConfig'.Steve Reinhardt
2006-10-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-09add in checkpoint restoration option, you can restore a checkpoint by giving ...Lisa Hsu