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path: root/configs/example/memtest.py
AgeCommit message (Expand)Author
2012-05-31Bus: Split the bus into a non-coherent and coherent busAndreas Hansson
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-02-14MEM: Fix residual bus ports and make them master/slaveAndreas Hansson
2012-01-28SE/FS: Make SE vs. FS mode a runtime parameter.Gabe Black
2010-08-25memtest: scale associativity and mshrs according to configSteve Reinhardt
2010-08-17sim: make Python Root object a singletonSteve Reinhardt
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
2007-07-15Fix problem with unset max_loads in memtest.Steve Reinhardt
2007-07-15Punt on old -n/-c memtest args.Steve Reinhardt
2007-07-15Add --force-bus option to memtest.py.Steve Reinhardt
2007-07-14New tree-based algorithm for creating more complex cache hierarchies.Steve Reinhardt
2007-06-27Get rid of coherence protocol object.Steve Reinhardt
2007-06-21Getting closer...Steve Reinhardt
2007-06-17More major reorg of cache. Seems to work for atomic mode now,Steve Reinhardt
2007-05-22memtest.py:Steve Reinhardt
2007-05-19PhysicalMemory has vector of uniform ports instead of one special one.Steve Reinhardt
2006-11-12Update for maxtick in splash2/memtest configsRon Dreslinski
2006-10-20Give physical memory some latency to stress the systemRon Dreslinski
2006-10-20Add a config file in the example with the memtester and some parser options.Ron Dreslinski