gem5 - gem5

Age	Commit message (Collapse)	Author
2012-04-16	Config: Add command line options for disk image and memory size	Jayneel Gandhi
	Added the options to Options.py for FS mode with backward compatibility. It is good to provide an option to specify the disk image and the memory size from command line since a lot of disk images are created to support different benchmark suites as well as per user needs. Change in program also leads to change in memory requirements. These options provide the interface to provide both disk image and memory size from the command line and gives more flexibility.
2012-04-05	Config: corrects the way Ruby attaches to the DMA ports	Nilay Vaish
	With recent changes to the memory system, a port cannot be assigned a peer port twice. While making use of the Ruby memory system in FS mode, DMA ports were assigned peer twice, once for the classic memory system and once for the Ruby memory system. This patch removes this double assignment of peer ports.
2012-03-28	Config: Change the way options are added	Nilay Vaish
	I am not too happy with the way options are added in files se.py and fs.py currently. This patch moves all the options to the file Options.py, functions from which are called when required.
2012-03-27	Config: Move setWorkCountOptions() to Simulation.py	Nilay Vaish
	The function is presently defined in FSConfig.py, which does not seem to be the correct place for it.
2012-03-16	ruby_fs.py: Add call to createInterruptController()	Nilay Vaish

2012-02-14	MEM: Fix master/slave ports in Ruby and non-regression scripts	Andreas Hansson
	This patch brings the Ruby and other scripts up to date with the introduction of the master/slave ports.
2012-02-13	MEM: Introduce the master/slave port roles in the Python classes	Andreas Hansson
	This patch classifies all ports in Python as either Master or Slave and enforces a binding of master to slave. Conceptually, a master (such as a CPU or DMA port) issues requests, and receives responses, and conversely, a slave (such as a memory or a PIO device) receives requests and sends back responses. Currently there is no differentiation between coherent and non-coherent masters and slaves. The classification as master/slave also involves splitting the dual role port of the bus into a master and slave port and updating all the system assembly scripts to use the appropriate port. Similarly, the interrupt devices have to have their int_port split into a master and slave port. The intdev and its children have minimal changes to facilitate the extra port. Note that this patch does not enforce any port typing in the C++ world, it merely ensures that the Python objects have a notion of the port roles and are connected in an appropriate manner. This check is carried when two ports are connected, e.g. bus.master = memory.port. The following patches will make use of the classifications and specialise the C++ ports into masters and slaves.
2012-01-29	Yet another merge with the main repository.	Gabe Black
	--HG-- rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal rename : tests/long/00.gzip/ref/x86/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simout => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout rename : tests/long/00.gzip/ref/x86/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt rename : tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini => tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini rename : tests/long/10.mcf/ref/x86/linux/o3-timing/simout => tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout rename : tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt rename : tests/long/20.parser/ref/x86/linux/o3-timing/config.ini => tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini rename : tests/long/20.parser/ref/x86/linux/o3-timing/simout => tests/long/se/20.parser/ref/x86/linux/o3-timing/simout rename : tests/long/20.parser/ref/x86/linux/o3-timing/stats.txt => tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt rename : tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini => tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini rename : tests/long/70.twolf/ref/x86/linux/o3-timing/simout => tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout rename : tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/x86/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simout => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout rename : tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt
2012-01-28	Config: Enable O3 CPU and Ruby in FS mode	Nilay Vaish

2012-01-28	SE/FS: Get rid of FULL_SYSTEM in the configs directory	Gabe Black

2012-01-28	SE/FS: Make SE vs. FS mode a runtime parameter.	Gabe Black

2011-10-29	Ruby FS: Add the options for kernel and simulation script	Nilay Vaish
	These options were missing from the script ruby_fs.py. This patch adds these options to the script.
2011-06-30	Ruby: Add support for functional accesses	Brad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
	This patch rpovides functional access support in Ruby. Currently only the M5Port of RubyPort supports functional accesses. The support for functional through the PioPort will be added as a separate patch.
2011-05-23	config: tweak ruby configs to clean up hierarchy	Steve Reinhardt
	Re-enabling implicit parenting (see previous patch) causes current Ruby config scripts to create some strange hierarchies and generate several warnings. This patch makes three general changes to address these issues. 1. The order of object creation in the ruby config files makes the L1 caches children of the sequencer rather than the controller; these config ciles are rewritten to assign the L1 caches to the controller first. 2. The assignment of the sequencer list to system.ruby.cpu_ruby_ports causes the sequencers to be children of system.ruby, generating warnings because they are already parented to their respective controllers. Changing this attribute to _cpu_ruby_ports fixes this because the leading underscore means this is now treated as a plain Python attribute rather than a child assignment. As a result, the configuration hierarchy changes such that, e.g., system.ruby.cpu_ruby_ports0 becomes system.l1_cntrl0.sequencer. 3. In the topology classes, the routers become children of some random internal link node rather than direct children of the topology. The topology classes are rewritten to assign the routers to the topology object first.
2011-02-08	config: fixed minor bug connecting dma devices to ruby	Brad Beckmann

2011-02-07	X86, Config: Move the setting of work count options to a separate function.	Gabe Black
	This way things that don't care about work count options and/or aren't called by something that has those command line options set up doesn't have to build a fake object to carry in inert values.
2011-02-06	m5: added work completed monitoring support	Brad Beckmann

2011-02-06	ruby: x86 fs config support	Brad Beckmann

2010-08-24	config: remove ruby's requirement on the timing cmd line param	Brad Beckmann
	Since ruby only works in timing mode, explicitly requiring the timing cmd line param to be specified is not necessary.
2010-08-24	config: fixed ruby dma device connections	Brad Beckmann

2010-08-20	config: Improve ruby simobject names	Brad Beckmann
	This patch attaches ruby objects to the system before the topology is created so that their simobject names read their meaningful variable names instead of their topology name.
2010-08-20	config: reorganized how ruby specifies command-line options	Brad Beckmann

2010-03-21	ruby: fixed how ruby_fs creates phsyical memory	Brad Beckmann
	Now ruby_fs creates physical memory of the right size.
2010-01-29	ruby: convert to M5 MemorySize	Brad Beckmann
	Converted both ruby caches and directory memory to use the M5 MemorySize python type.
2010-01-29	ruby: FS support using the new configuration system	Brad Beckmann

2009-11-18	m5: improvements to the ruby_fs.py file	Brad Beckmann

2009-11-18	ruby: Support for merging ALPHA_FS and ruby	Brad Beckmann
	Connects M5 cpu and dma ports directly to ruby sequencers and dma sequencers. Rubymem also includes a pio port so that pio requests and be forwarded to a special pio bus connecting to device pio ports.