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2013-08-19
power: Add voltage domains to the clock domains
Akash Bagdia
2013-08-19
config: Move the memory instantiation outside FSConfig
Andreas Hansson
2013-07-18
config: Update script to set cache line size on system
Andreas Hansson
2013-06-28
configs: rearrange the available options in Options.py
Nilay Vaish
2013-06-27
sim: Add the notion of clock domains to all ClockedObjects
Akash Bagdia
2013-06-27
config: Add a system clock command-line option
Akash Bagdia
2013-06-27
config: Add a CPU clock command-line option
Akash Bagdia
2013-06-27
config: Remove redundant explicit setting of default clocks
Akash Bagdia
2013-06-13
config: Do not instantiate membus when using ruby
Nilay Vaish
2013-04-23
config: Fix mem-type option not used in ruby_fs script
Marco Elver
2013-04-22
config: Add a mem-type config option to se/fs scripts
Andreas Hansson
2013-04-22
config: Add a KVM VM to systems with KVM CPUs
Andreas Sandberg
2013-04-22
cpu: generate SimPoint basic block vector profiles
Dam Sunwoo
2013-03-06
ruby: remove the functional copy of memory in se mode
Nilay Vaish
2013-02-15
options: add command line option for dtb file
Anthony Gutierrez
2013-01-07
config: Do not use hardcoded physmem in fs script
Andreas Hansson
2013-01-07
arch: Make the ISA class inherit from SimObject
Andreas Sandberg
2012-12-11
ruby: modify the directed tester to read/write streams
Nilay Vaish
2012-10-26
config: Add a check for fastmem only used with Atomic CPU
Andreas Hansson
2012-10-26
config: Remove unused mem_size in fs.py
Andreas Hansson
2012-10-15
ruby: improved support for functional accesses
Nilay Vaish
2012-10-15
Mem: Use cycles to express cache-related latencies
Andreas Hansson
2012-09-28
Configs: SE script fix for Alpha and Ruby simulations
Malek Musleh
2012-09-27
Configs: Fix memtest cache latency to match new parameters
Andreas Hansson
2012-09-27
Configs: Fix memtest.py by moving the system port
Andreas Hansson
2012-09-12
se.py Ruby: Connect TLB walker ports
Joel Hestness
2012-09-11
se.py: removes error in passing options to a binary
Nilay Vaish
2012-09-09
se.py: support specifying multiple programs via command line
Nilay Vaish
2012-08-22
Bridge: Remove NACKs in the bridge and unify with packet queue
Andreas Hansson
2012-07-23
Config: Use clock option in se/fs script and pass to switch_cpus
Andreas Hansson
2012-07-12
Mem: Make SimpleMemory single ported
Andreas Hansson
2012-07-10
ruby: remove the cpu assumptions for the random tester
Brad Beckmann
2012-07-10
ruby: changes how Topologies are created
Brad Beckmann
2012-06-07
Config: call to setWorkCountOptions() for all ISAs
Nilay Vaish
2012-06-07
Config: Remove setMipsOptions
Nilay Vaish
2012-06-07
Config: changes to a couple of error msgs
Nilay Vaish
2012-05-31
Bus: Split the bus into a non-coherent and coherent bus
Andreas Hansson
2012-05-16
Config: Fix a typo in the se.py script for setting fastmem
Andreas Hansson
2012-04-17
SE Config: Changed se.py to support multithreaded mode
Jayneel Gandhi
2012-04-16
Config: Add command line options for disk image and memory size
Jayneel Gandhi
2012-04-06
rubytest: seperated read and write ports.
Brad Beckmann
2012-04-06
MEM: Enable multiple distributed generalized memories
Andreas Hansson
2012-04-05
Config: corrects the way Ruby attaches to the DMA ports
Nilay Vaish
2012-04-05
Ruby: Fix the example configurations option parsing
Andreas Hansson
2012-04-03
Atomic: Remove the physmem_port and access memory directly
Andreas Hansson
2012-03-28
Config: Change the way options are added
Nilay Vaish
2012-03-27
Config: Move setWorkCountOptions() to Simulation.py
Nilay Vaish
2012-03-16
ruby_fs.py: Add call to createInterruptController()
Nilay Vaish
2012-03-11
se.py: Changes to ruby portion due to SE/FS merge
Nilay Vaish
2012-03-09
ARM: Fix memory starting at non-zero address and exceeding max mem for a system.
Ali Saidi
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