gem5 - gem5

Age	Commit message (Expand)	Author
2014-09-20	mem: Rename Bus to XBar to better reflect its behaviour	Andreas Hansson
2014-09-20	cpu: use probes infrastructure to do simpoint profiling	Dam Sunwoo
2014-09-01	ruby: Fixes clock domains in configuration files	Emilio Castillo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2014-08-10	config: Fix cache latency param in mem test	Radhika Jagtap
2014-04-01	configs: use SimpleMemory when using ruby in se mode	Nilay Vaish
2014-03-20	config: ruby: rename _cpu_ruby_ports to _cpu_ports	Nilay Vaish
2014-03-20	config: fs.py: move creating of test/drive systems to functions	Nilay Vaish
2014-03-20	config: remove ruby_fs.py	Nilay Vaish
2014-03-20	ruby: no piobus in se mode	Nilay Vaish
2014-02-24	ruby: correct errors in changeset 4eec7bdde5b0	Nilay Vaish
2014-02-23	ruby: route all packets through ruby port	Nilay Vaish
2014-02-21	config: ruby_random_test: updates due to recent unrelated changes	Nilay Vaish
2014-01-31	config: correct bug in x86 drive sys instantiation	Nilay Vaish
2014-01-27	config: allow more than 3GB of memory for x86 simulations	Nilay Vaish
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2013-10-17	util: Streamline .apc project convertsion script	Dam Sunwoo
2013-10-17	config: Fix memtest example script	Ali Saidi
2013-10-09	config: correct example ruby scripts	Nilay Vaish
2013-10-07	config: set cwd for processes in se.py	Nilay Vaish
2013-09-17	configs: Fix ruby_fs.py cache line size	Joel Hestness
2013-09-12	config: Add voltage domain to Ruby example scripts	Andreas Hansson
2013-08-19	config: Command line support for multi-channel memory	Andreas Hansson
2013-08-19	mem: Change AbstractMemory defaults to match the common case	Andreas Hansson
2013-08-19	power: Add voltage domains to the clock domains	Akash Bagdia
2013-08-19	config: Move the memory instantiation outside FSConfig	Andreas Hansson
2013-07-18	config: Update script to set cache line size on system	Andreas Hansson
2013-06-28	configs: rearrange the available options in Options.py	Nilay Vaish
2013-06-27	sim: Add the notion of clock domains to all ClockedObjects	Akash Bagdia
2013-06-27	config: Add a system clock command-line option	Akash Bagdia
2013-06-27	config: Add a CPU clock command-line option	Akash Bagdia
2013-06-27	config: Remove redundant explicit setting of default clocks	Akash Bagdia
2013-06-13	config: Do not instantiate membus when using ruby	Nilay Vaish
2013-04-23	config: Fix mem-type option not used in ruby_fs script	Marco Elver
2013-04-22	config: Add a mem-type config option to se/fs scripts	Andreas Hansson
2013-04-22	config: Add a KVM VM to systems with KVM CPUs	Andreas Sandberg
2013-04-22	cpu: generate SimPoint basic block vector profiles	Dam Sunwoo
2013-03-06	ruby: remove the functional copy of memory in se mode	Nilay Vaish
2013-02-15	options: add command line option for dtb file	Anthony Gutierrez
2013-01-07	config: Do not use hardcoded physmem in fs script	Andreas Hansson
2013-01-07	arch: Make the ISA class inherit from SimObject	Andreas Sandberg
2012-12-11	ruby: modify the directed tester to read/write streams	Nilay Vaish
2012-10-26	config: Add a check for fastmem only used with Atomic CPU	Andreas Hansson
2012-10-26	config: Remove unused mem_size in fs.py	Andreas Hansson
2012-10-15	ruby: improved support for functional accesses	Nilay Vaish
2012-10-15	Mem: Use cycles to express cache-related latencies	Andreas Hansson
2012-09-28	Configs: SE script fix for Alpha and Ruby simulations	Malek Musleh
2012-09-27	Configs: Fix memtest cache latency to match new parameters	Andreas Hansson
2012-09-27	Configs: Fix memtest.py by moving the system port	Andreas Hansson
2012-09-12	se.py Ruby: Connect TLB walker ports	Joel Hestness
2012-09-11	se.py: removes error in passing options to a binary	Nilay Vaish