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--HG--
extra : convert_revision : 565f75f76dd26ca0e25de4c89d1597a9f39483fd
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--HG--
extra : convert_revision : f015cac39e42e11b1a56bbd1c5cf07403eb8f2da
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Time to make the ide device work
arch/alpha/system.cc:
write the machine type and rev in the correct place
cpu/simple/cpu.cc:
reset the packet structure every time it's reused... wow the
simple cpu code for talking to memory is getting horrible.
dev/alpha_console.cc:
move the setAlphaAccess to startup() to make sure that the console
binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
More verbose bus tracing
mem/packet.hh:
Add a constructor to packet to set the result to unknown and a reset
method in the case it's being reused
mem/vport.hh:
don't need are own read/write methods since the base functional port
ones call writeBlob readBlob which do the translation for us
--HG--
extra : convert_revision : 8d0e2b782bfbf13dc5c59dab1a79a084d2a7da0a
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--HG--
extra : convert_revision : cb021c1e704b5771e0f86e794b7e59f8a4b96856
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in the InstObjParams constructor.
arch/isa_parser.py:
Expanded the capability of the InstObjParams constructor to allow adding in extra keys for use in templates. These are added as key, value tuples as optional arguements.
arch/sparc/isa/base.isa:
arch/sparc/isa/formats/mem.isa:
arch/sparc/isa/formats/priv.isa:
The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor.
arch/sparc/isa/decoder.isa:
Fixed up alot of instructions, and fixed indentation.
arch/sparc/isa/formats/integerop.isa:
The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor. Also changed the immediate values to be signed.
base/traceflags.py:
Added SPARC traceflag
configs/test/hello_sparc:
Recompiled without -mflat
cpu/cpu_exec_context.cc:
Used the regfile clear function rather than memsetting to 0.
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extra : convert_revision : b9da6f264f3ebc4ce1815008dfff7f476b247ee9
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arch/sparc/isa/base.isa:
arch/sparc/isa/decoder.isa:
arch/sparc/isa/formats.isa:
arch/sparc/isa/formats/branch.isa:
arch/sparc/isa/formats/integerop.isa:
arch/sparc/isa/formats/mem.isa:
arch/sparc/isa/formats/nop.isa:
arch/sparc/isa/formats/trap.isa:
arch/sparc/isa/formats/unknown.isa:
arch/sparc/isa/includes.isa:
arch/sparc/isa/operands.isa:
Fixes towards running in syscall emulation mode.
arch/sparc/linux/process.cc:
Fixed the assert and comment to check that the Num_Syscall_Descs is less than or equal to 284. Why does this assert need to exist anyway?
base/loader/elf_object.cc:
Cleared out comments about resolved issues.
cpu/simple/cpu.cc:
Use NNPC for both SPARC and MIPS, instead of just MIPS
configs/test/hello_sparc:
A test program for SPARC which prints "Hello World!"
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rename : arch/sparc/isa/formats/noop.isa => arch/sparc/isa/formats/nop.isa
extra : convert_revision : 10b3e3b9f21c215d809cffa930448007102ba698
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--HG--
extra : convert_revision : 111af292373edebcd106938e76610f9ac4a6ce58
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--HG--
extra : convert_revision : 96b5494b7d0b5ca702ac69cfa0bf8c4d44e1cc3b
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into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips
--HG--
extra : convert_revision : 9bdde9b5bd3049744451eda1134f080b7c4b1b59
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is changed
Add a default machine width parameter
Arch based live processes
arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
Add a default machine width parameter
mem/port.hh:
gcc 4 really wants a virtual destructor
sim/byteswap.hh:
remove the comment around long and unsigned long even though uint32_t
and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
add translations for new sections that are mmapped or when the brk
is changed
--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
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configs/test/hello_mips:
hello world mips binary
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extra : convert_revision : 5a495e1bfb1cbddc0879f8e80c02bd7435a02acb
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on execution.
configs/test/test.py:
Move test binary out of m5-test, don't depend on
m5-test/Benchmarks.
python/m5/objects/System.py:
Split out full-system-only parameters (lost in merge).
sim/system.cc:
Need to be able to instantiate System directly in SE mode
(lost in merge).
sim/system.hh:
A few more functions here are FS-only.
configs/test/hello:
Add in binary.
--HG--
rename : configs/test.py => configs/test/test.py
extra : convert_revision : 4051b18772e0a0dcb97eb591d4373683be9f4395
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