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AgeCommit message (Expand)Author
2007-07-14New tree-based algorithm for creating more complex cache hierarchies.Steve Reinhardt
2007-06-30Get rid of remaining traces of obsolete CoherenceProtocol object.Steve Reinhardt
2007-06-27Get rid of coherence protocol object.Steve Reinhardt
2007-06-21Getting closer...Steve Reinhardt
2007-06-17Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
2007-06-17More major reorg of cache. Seems to work for atomic mode now,Steve Reinhardt
2007-06-10the cmd argument is supposed to be an array of parameters, not one stringNathan Binkert
2007-06-09More realistic parametersNathan Binkert
2007-06-04fix SPARC....Ali Saidi
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
2007-05-22memtest.py:Steve Reinhardt
2007-05-19PhysicalMemory has vector of uniform ports instead of one special one.Steve Reinhardt
2007-05-15add an l2 cache option to se example configAli Saidi
2007-05-15hopefully the final hacky change to make the bus bridge work okAli Saidi
2007-05-14couple more bug fixes for intel nicAli Saidi
2007-05-10remove hit_latency and make latency do the right thingAli Saidi
2007-05-07fix partial writes with a functional memory hackAli Saidi
2007-04-30add a udp stream benchmark and a udp loopback benchmarkAli Saidi
2007-04-30make ping actually endAli Saidi
2007-04-26Fix mutex test script for latest disk image.Kevin Lim
2007-04-23Fix the splash2 run scriptRon Dreslinski
2007-04-20spec-surge-client.rcS:Lisa Hsu
2007-03-22Fix mcf benchmark object so it gets the arguments it expects.Gabe Black
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
2007-03-03Merge zizzer:/bk/newmemAli Saidi
2007-03-03Add Iob and remove the fake deviceAli Saidi
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
2007-03-03Keep around which input set was used for a benchmark, and make vortex work wi...Gabe Black
2007-02-21Get rid of the ConsoleListener SimObject and just fold theNathan Binkert
2007-01-30fix some checkpointing annoyancesAli Saidi
2007-01-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-01-09add memory mapped disk deviceAli Saidi
2007-01-03Merge zizzer:/bk/newmemGabe Black
2006-12-22Add options for setting the kernel to run and theNathan Binkert
2006-12-06Many more fixes for SPARC_FS. Gets us to the point where SOFTINT startsAli Saidi
2006-12-04automatically build sparc system or alpha system.Lisa Hsu
2006-12-04Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-04More changes to get SPARC fs closer. Now at 1.2M cycles before differenceAli Saidi
2006-12-01Merge zizzer:/bk/sparcfsLisa Hsu
2006-11-30Load the hypervisor symbols twice, once with an address mask so that we can g...Ali Saidi
2006-11-30netperf-maerts-client.rcS:Lisa Hsu
2006-11-29Merge zizzer:/bk/sparcfsGabe Black
2006-11-26Include check for making sure caches are enabled.Kevin Lim
2006-11-22Added a parameter to set memory to zero. This is to support Legion, and once ...Gabe Black
2006-11-22Merge zizzer:/bk/sparcfsGabe Black
2006-11-20Add in rom/rams for the nvram, hypervisor description, and partition descript...Gabe Black
2006-11-16Implement a single config file to encompass all of the SPECNathan Binkert
2006-11-16Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemopsGabe Black
2006-11-16Fixes for SPARC_FSGabe Black
2006-11-15Add L2 cache option to fs.py --l2cacheRon Dreslinski
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