summaryrefslogtreecommitdiff
path: root/configs
AgeCommit message (Expand)Author
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
2007-03-03Merge zizzer:/bk/newmemAli Saidi
2007-03-03Add Iob and remove the fake deviceAli Saidi
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
2007-03-03Keep around which input set was used for a benchmark, and make vortex work wi...Gabe Black
2007-02-21Get rid of the ConsoleListener SimObject and just fold theNathan Binkert
2007-01-30fix some checkpointing annoyancesAli Saidi
2007-01-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-01-09add memory mapped disk deviceAli Saidi
2007-01-03Merge zizzer:/bk/newmemGabe Black
2006-12-22Add options for setting the kernel to run and theNathan Binkert
2006-12-06Many more fixes for SPARC_FS. Gets us to the point where SOFTINT startsAli Saidi
2006-12-04automatically build sparc system or alpha system.Lisa Hsu
2006-12-04Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-04More changes to get SPARC fs closer. Now at 1.2M cycles before differenceAli Saidi
2006-12-01Merge zizzer:/bk/sparcfsLisa Hsu
2006-11-30Load the hypervisor symbols twice, once with an address mask so that we can g...Ali Saidi
2006-11-30netperf-maerts-client.rcS:Lisa Hsu
2006-11-29Merge zizzer:/bk/sparcfsGabe Black
2006-11-26Include check for making sure caches are enabled.Kevin Lim
2006-11-22Added a parameter to set memory to zero. This is to support Legion, and once ...Gabe Black
2006-11-22Merge zizzer:/bk/sparcfsGabe Black
2006-11-20Add in rom/rams for the nvram, hypervisor description, and partition descript...Gabe Black
2006-11-16Implement a single config file to encompass all of the SPECNathan Binkert
2006-11-16Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemopsGabe Black
2006-11-16Fixes for SPARC_FSGabe Black
2006-11-15Add L2 cache option to fs.py --l2cacheRon Dreslinski
2006-11-13Update splash2 config filesRon Dreslinski
2006-11-12Merge ktlim@zamp:./local/clean/tmp/test-regressKevin Lim
2006-11-12Update for maxtick in splash2/memtest configsRon Dreslinski
2006-11-10Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-11-09Get SPARC to the point that it starts running. Add ability to load the ROM bi...Ali Saidi
2006-11-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-11-09Clean up config scripts to not have to worry about attaching a cache only to ...Kevin Lim
2006-11-08simplify maxtick parsing in both the python and the c++.Lisa Hsu
2006-11-08make rcS files read from the m5 source directory, not /dist.Lisa Hsu
2006-11-08change to os.path.join like nate wanted.Lisa Hsu
2006-11-01factor some more commone code and enable going from checkpoint into arbitrary...Lisa Hsu
2006-11-01make it so that you can do a standard switch without the caches option. this...Lisa Hsu
2006-11-01change name of 2nd switch_cpu so that ckpt recovery with multiple cpus doens'...Lisa Hsu
2006-10-31Fix up configs.Kevin Lim
2006-10-31Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-31Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...Kevin Lim
2006-10-30FSConfig.py:Lisa Hsu
2006-10-30se.py, fs.py:Lisa Hsu
2006-10-30ensure that there is a "/" between the cptdir and the cpt.%d.Lisa Hsu
2006-10-30Merge zizzer:/bk/newmemLisa Hsu
2006-10-30decouple the switch option from the warmup period option - parsing was confus...Lisa Hsu
2006-10-30Use some python os.path stuff to make it more flexible where we can execute t...Kevin Lim
2006-10-30add some comments and make the warmup period in a switchover parameterizable.Lisa Hsu
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-24 12:28:35 +0000