gem5 - gem5

Age	Commit message (Expand)	Author
2015-03-02	mem: Move crossbar default latencies to subclasses	Andreas Hansson
2015-02-26	Ruby: Update backing store option to propagate through to all RubyPorts	Jason Power
2015-02-16	config: Add memcheck stress test	Andreas Hansson
2015-01-16	config: add --root-device machine parameter	Curtis Dunham
2015-02-11	config: Revamp memtest to allow testers on any level	Andreas Hansson
2015-02-11	cpu: Tidy up the MemTest and make false sharing more obvious	Andreas Hansson
2015-02-05	config: rename 'file' var	Steve Reinhardt
2015-02-05	config: make M5_PATH a real search path	Steve Reinhardt
2015-02-03	config: Add XOR hashing to the DRAM channel interleaving	Andreas Hansson
2015-02-03	config: Adjust DRAM channel interleaving defaults	Andreas Hansson
2015-01-30	config: arm: fix os_flags	Malek Musleh
2015-01-20	config, ruby: connect dma to network	Malek Musleh
2015-01-20	scons: Do not build the InOrderCPU	Andreas Hansson
2015-01-03	arm: fix build_drive_system when not using default options	Anthony Gutierrez
2015-01-03	configs: ruby: removes bug introduced by 05b5a6cf3521	Nilay Vaish
2014-12-23	config: Expose the DRAM ranks as a command-line option	Andreas Hansson
2014-12-23	config: Add --memchecker option	Marco Elver
2014-12-23	config: Add options to take/resume from SimPoint checkpoints	Dam Sunwoo
2014-12-04	config: Add two options for setting the kernel command line.	Gabe Black
2014-12-04	config: ruby: mi protocol: correct master slave setting for dma	Nilay Vaish
2014-12-03	config: Get rid of some extra spaces around default arguments.	Gabe Black
2014-11-23	config, kvm: Enabling KvmCPU in SE mode	Alexandru Dutu
2014-11-23	Backed out prior changeset f9fb64a72259	Steve Reinhardt
2014-11-23	config: ruby: Get rid of an "eval" and an "exec" operating on generated code.	Gabe Black
2014-11-18	configs: small fix to ruby portion of fs.py and se.py	Nilay Vaish
2014-11-06	x86 isa: This patch attempts an implementation at mwait.	Marc Orr
2014-11-06	ruby: provide a backing store	Nilay Vaish
2014-11-06	ruby: interface with classic memory controller	Nilay Vaish
2014-11-06	ruby: single physical memory in fs mode	Nilay Vaish
2014-10-29	arm, tests: Update config files to more recent kernels and create 64-bit regr...	Ali Saidi
2014-10-29	arm: fix bare-metal memory setup.	Ali Saidi
2014-10-16	config: Add the ability to read a config file using C++ and Python	Andreas Hansson
2014-10-11	config: separate function for instantiating a memory controller	Nilay Vaish
2014-10-11	ruby: moesi hammer: correct typo in master-slave assignment	Nilay Vaish
2014-07-17	config, x86: Ensure that PCI devs get bridged to the memory bus	Jiuyue Ma
2014-07-17	config, x86: swap bus_id of ISA/PCI in X86 IntelMPTable	Jiuyue Ma
2014-09-20	mem: Rename Bus to XBar to better reflect its behaviour	Andreas Hansson
2014-09-20	cpu: Update DRAM traffic gen	Wendy Elsasser
2014-09-20	cpu: use probes infrastructure to do simpoint profiling	Dam Sunwoo
2014-09-03	arm: Support >2GB of memory for AArch64 systems	Ali Saidi
2014-09-03	arm: Assume we have a kernel that supports pci devices	Ali Saidi
2014-09-03	config: Refactor RealviewEMM to fit into new config system	Geoffrey Blake
2014-09-03	cpu: Change writeback modeling for outstanding instructions	Mitch Hayenga
2014-09-03	mem: Add utility script to plot DRAM efficiency sweep	Andreas Hansson
2014-09-01	ruby: message buffers: significant changes	Nilay Vaish
2014-09-01	ruby: Fixes clock domains in configuration files	Emilio Castillo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2014-08-10	config: Fix cache latency param in mem test	Radhika Jagtap
2014-07-28	arm: make the PseudoLRU tags the default for the O3_ARM_v7aL2	Anthony Gutierrez
2014-07-23	cpu: `Minor' in-order CPU model	Andrew Bardsley
2014-06-30	arm: make the bi-mode predictor the default for O3_ARM_v7a_BP	Anthony Gutierrez