Age | Commit message (Expand) | Author |
2017-12-05 | learning_gem5: Adds the simple MemObject code | Jason Lowe-Power |
2017-12-05 | learning_gem5: Add code for hello-goodbye example | Jason Lowe-Power |
2017-12-05 | learning_gem5: Add code for simple SimObject | Jason Lowe-Power |
2017-11-16 | tests: Add tests for DRAM low power modes | Radhika Jagtap |
2017-11-16 | config: Add low power sweep for DRAM | Radhika Jagtap |
2017-11-13 | config: Fix the "script" SysPath functor. | Gabe Black |
2017-10-31 | config: Rework the SysPaths functions into functors. | Gabe Black |
2017-08-03 | configs, arm: Fix incorrect use of mem_range in bL example | Andreas Sandberg |
2017-08-03 | arm, config: Fix CPU names in ARM example configs | Andreas Sandberg |
2017-08-01 | arch-arm: Switch to DTOnly as the default machine type | Andreas Sandberg |
2017-07-28 | config: Discover CPU timing models based on target ISA | Andreas Sandberg |
2017-07-27 | config, arm: SE configuration for the ARM starter kit | Gabor Dozsa |
2017-07-27 | config, arm: FS configuration for the ARM starter kit | Gabor Dozsa |
2017-07-27 | config, arm: Add a high-performance in order timing model | Ashkan Tousi |
2017-07-27 | config: Change mem_range attribute naming in ARM SimpleSystem | Gabor Dozsa |
2017-07-25 | configs,sim-se: fix se.py multi-cpu multi-cmd issue | Pau Cabre |
2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
2017-07-04 | config, arm: Don't import timing models for missing CPUs | Andreas Sandberg |
2017-07-03 | config: Clean up core timing model discovery | Andreas Sandberg |
2017-07-03 | config: Move core timing models to config/common/cores | Andreas Sandberg |
2017-07-03 | config: Make ex5_*.py independent of old configs | Andreas Sandberg |
2017-06-30 | config: Add missing import of 'fatal' in CpuConfig | Andreas Sandberg |
2017-06-30 | config: Make some MemConfig options optional | Andreas Sandberg |
2017-06-19 | configs, arm: add option to enable security extensions | Gedare Bloom |
2017-06-15 | configs: fixed SimpleOpts missing error by adding library path | Zhang Zheng |
2017-06-13 | config: Warn not fail for ARM systems configured with ruby | Nikos Nikoleris |
2017-06-13 | ruby, arm: Forward invalidations to the local exclusive monitor | Nikos Nikoleris |
2017-06-13 | ruby: Add support for address ranges in the directory | Nikos Nikoleris |
2017-05-18 | configs: fix cpu names in big.LITTLE example | Pierre-Yves Péneau |
2017-05-18 | arm, config: added support for ex5 model of big.LITTLE | Pierre-Yves Péneau |
2017-05-17 | config: Changes to boot Android N | Weiping Liao |
2017-05-09 | config: Fix up some configs to not use CPU aliases. | Gabe Black |
2017-05-06 | config: Remove support for CPU aliases. | Gabe Black |
2017-04-11 | config, arm: Add an example power model | Andreas Sandberg |
2017-04-05 | config: Add a default system disk image for SPARC FS. | Gabe Black |
2017-04-03 | config, arm: Add multi-core KVM support to bL config | Andreas Sandberg |
2017-04-03 | config, arm: Unify checkpoint path handling in bL configs | Andreas Sandberg |
2017-03-01 | config: exit with fatal() if error | Pierre-Yves Péneau |
2016-11-09 | syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead | Brandon Potter |
2017-02-14 | arm,config: Add dist-gem5 support to the big.LITTLE(tm) config | Gabor Dozsa |
2017-02-14 | config: Refactor the network switch configuration file | Gabor Dozsa |
2017-02-14 | arm,config: Refactor the example big.LITTLE(tm) configuration | Gabor Dozsa |
2017-02-14 | sim, kvm: make KvmVM a System parameter | Curtis Dunham |
2017-02-14 | mem: Update DRAM configuration names | Wendy Elsasser |
2017-02-09 | misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10] | Christian Menard |
2017-01-27 | mem: Add memory footprint probe | Rahul Thakur |
2017-01-09 | config: Fix missing include in fs.py | Matthias Jung |
2016-12-19 | python: Export periodicStatDump | Andreas Sandberg |
2016-12-19 | sim: Remove redundant buildEnv import | Andreas Sandberg |
2016-12-15 | ruby: Detect garnet network-level deadlock. | Jieming Yin |