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AgeCommit message (Expand)Author
2014-03-20ruby: garnet: convert network interfaces into clocked objectsNilay Vaish
2014-03-20config: ruby: rename _cpu_ruby_ports to _cpu_portsNilay Vaish
2014-03-20config: fs.py: move creating of test/drive systems to functionsNilay Vaish
2014-03-20config: remove ruby_fs.pyNilay Vaish
2014-03-20ruby: no piobus in se modeNilay Vaish
2014-03-17config: ruby: remove piobus from protocolsNilay Vaish
2014-02-24ruby: correct errors in changeset 4eec7bdde5b0Nilay Vaish
2014-02-23ruby: route all packets through ruby portNilay Vaish
2014-02-23config: topologies: slight code refactorNilay Vaish
2014-02-21config: ruby_random_test: updates due to recent unrelated changesNilay Vaish
2014-02-18arm: armv8 boot options to enable v8Anthony Gutierrez
2014-02-18mem: Add a wrapped DRAMSim2 memory controllerAndreas Hansson
2014-01-31config: correct bug in x86 drive sys instantiationNilay Vaish
2014-01-28x86: add a warning about the number of memory controllersNilay Vaish
2014-01-27config: allow more than 3GB of memory for x86 simulationsNilay Vaish
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2014-01-10ruby: move all statistics to stats.txt, eliminate ruby.statsNilay Vaish
2014-01-04ruby: add a three level MESI protocol.Nilay Vaish
2014-01-04ruby: rename MESI_CMP_directory to MESI_Two_LevelNilay Vaish
2014-01-04ruby: remove cntrl_id from python config scripts.Nilay Vaish
2014-01-04ruby: some small changesNilay Vaish
2014-01-03config, x86: move kernel specification from tests to FSConfig.pySteve Reinhardt
2013-12-20ruby: mesi: remove owner and sharer fields from directory tagsNilay Vaish
2013-11-15cpu: allow the fetch buffer to be smaller than a cache lineAnthony Gutierrez
2013-10-17util: Streamline .apc project convertsion scriptDam Sunwoo
2013-10-17arm, config: Fix a small issue with the dtb file being specifiedAli Saidi
2013-10-17config: Fix memtest example scriptAli Saidi
2013-10-09config: correct example ruby scriptsNilay Vaish
2013-10-07config: set cwd for processes in se.pyNilay Vaish
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
2013-09-30config: Add a 'kvm' CPU aliasAndreas Sandberg
2013-09-17configs: Fix ruby_fs.py cache line sizeJoel Hestness
2013-09-12config: Add voltage domain to Ruby example scriptsAndreas Hansson
2013-09-11config: Initialize and check cpt_starttickJoel Hestness
2013-09-06ruby: network: correct naming of routersNilay Vaish
2013-08-26ARM: Fix configuration files for bare-metal binaries.Ali Saidi
2013-08-20ruby: add option for number of transitions per cycleNilay Vaish
2013-08-19config: Command line support for multi-channel memoryAndreas Hansson
2013-08-19mem: Change AbstractMemory defaults to match the common caseAndreas Hansson
2013-08-19power: Add voltage domains to the clock domainsAkash Bagdia
2013-08-19config: Move the memory instantiation outside FSConfigAndreas Hansson
2013-07-18Configs: Fix up maxtick and maxtimeJoel Hestness
2013-07-18config: Update script to set cache line size on systemAndreas Hansson
2013-06-28configs: rearrange the available options in Options.pyNilay Vaish
2013-06-28ruby: check for compatibility between mem size and num dirsNilay Vaish
2013-06-27sim: Add the notion of clock domains to all ClockedObjectsAkash Bagdia
2013-06-27config: Rename clock option to Ruby clockAkash Bagdia
2013-06-27config: Add a system clock command-line optionAkash Bagdia
2013-06-27config: Add a CPU clock command-line optionAkash Bagdia
2013-06-27config: Remove redundant explicit setting of default clocksAkash Bagdia