Age | Commit message (Expand) | Author |
2014-02-24 | ruby: correct errors in changeset 4eec7bdde5b0 | Nilay Vaish |
2014-02-23 | ruby: route all packets through ruby port | Nilay Vaish |
2014-02-23 | config: topologies: slight code refactor | Nilay Vaish |
2014-02-21 | config: ruby_random_test: updates due to recent unrelated changes | Nilay Vaish |
2014-02-18 | arm: armv8 boot options to enable v8 | Anthony Gutierrez |
2014-02-18 | mem: Add a wrapped DRAMSim2 memory controller | Andreas Hansson |
2014-01-31 | config: correct bug in x86 drive sys instantiation | Nilay Vaish |
2014-01-28 | x86: add a warning about the number of memory controllers | Nilay Vaish |
2014-01-27 | config: allow more than 3GB of memory for x86 simulations | Nilay Vaish |
2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
2014-01-10 | ruby: move all statistics to stats.txt, eliminate ruby.stats | Nilay Vaish |
2014-01-04 | ruby: add a three level MESI protocol. | Nilay Vaish |
2014-01-04 | ruby: rename MESI_CMP_directory to MESI_Two_Level | Nilay Vaish |
2014-01-04 | ruby: remove cntrl_id from python config scripts. | Nilay Vaish |
2014-01-04 | ruby: some small changes | Nilay Vaish |
2014-01-03 | config, x86: move kernel specification from tests to FSConfig.py | Steve Reinhardt |
2013-12-20 | ruby: mesi: remove owner and sharer fields from directory tags | Nilay Vaish |
2013-11-15 | cpu: allow the fetch buffer to be smaller than a cache line | Anthony Gutierrez |
2013-10-17 | util: Streamline .apc project convertsion script | Dam Sunwoo |
2013-10-17 | arm, config: Fix a small issue with the dtb file being specified | Ali Saidi |
2013-10-17 | config: Fix memtest example script | Ali Saidi |
2013-10-09 | config: correct example ruby scripts | Nilay Vaish |
2013-10-07 | config: set cwd for processes in se.py | Nilay Vaish |
2013-09-30 | x86: Add support for m5ops through a memory mapped interface | Andreas Sandberg |
2013-09-30 | config: Add a 'kvm' CPU alias | Andreas Sandberg |
2013-09-17 | configs: Fix ruby_fs.py cache line size | Joel Hestness |
2013-09-12 | config: Add voltage domain to Ruby example scripts | Andreas Hansson |
2013-09-11 | config: Initialize and check cpt_starttick | Joel Hestness |
2013-09-06 | ruby: network: correct naming of routers | Nilay Vaish |
2013-08-26 | ARM: Fix configuration files for bare-metal binaries. | Ali Saidi |
2013-08-20 | ruby: add option for number of transitions per cycle | Nilay Vaish |
2013-08-19 | config: Command line support for multi-channel memory | Andreas Hansson |
2013-08-19 | mem: Change AbstractMemory defaults to match the common case | Andreas Hansson |
2013-08-19 | power: Add voltage domains to the clock domains | Akash Bagdia |
2013-08-19 | config: Move the memory instantiation outside FSConfig | Andreas Hansson |
2013-07-18 | Configs: Fix up maxtick and maxtime | Joel Hestness |
2013-07-18 | config: Update script to set cache line size on system | Andreas Hansson |
2013-06-28 | configs: rearrange the available options in Options.py | Nilay Vaish |
2013-06-28 | ruby: check for compatibility between mem size and num dirs | Nilay Vaish |
2013-06-27 | sim: Add the notion of clock domains to all ClockedObjects | Akash Bagdia |
2013-06-27 | config: Rename clock option to Ruby clock | Akash Bagdia |
2013-06-27 | config: Add a system clock command-line option | Akash Bagdia |
2013-06-27 | config: Add a CPU clock command-line option | Akash Bagdia |
2013-06-27 | config: Remove redundant explicit setting of default clocks | Akash Bagdia |
2013-06-13 | config: Do not instantiate membus when using ruby | Nilay Vaish |
2013-06-03 | config: Add missing CPUs to --restore-with-cpu | Andreas Sandberg |
2013-05-30 | mem: More descriptive DRAM config names | Andreas Hansson |
2013-05-30 | mem: Add a LPDDR3-1600 configuration | Andreas Hansson |
2013-05-30 | mem: Avoid explicitly zeroing the memory backing store | Andreas Hansson |
2013-05-21 | ruby: moesi hammer: cosmetic changes | Nilay Vaish |