summaryrefslogtreecommitdiff
path: root/configs
AgeCommit message (Expand)Author
2015-12-07config: Enable elastic trace capture and replay in se/fsRadhika Jagtap
2015-12-05dev: Rewrite PCI host functionalityAndreas Sandberg
2015-12-04arm, config: Automatically discover available platformsAndreas Sandberg
2015-11-22config: Added missing types to JSON/INI Python readerAndrew Bardsley
2015-11-22config: Minor fixes to the DRAM utilisation sweepAndreas Hansson
2015-11-06config: Update memtest to stress test clean writebacksAndreas Hansson
2015-11-06mem: Add an option to perform clean writebacks from cachesAndreas Hansson
2015-11-06config: Update memtest to stress test cache clusivityAndreas Hansson
2015-11-06mem: Add cache clusivityAndreas Hansson
2015-11-04configs: fix bug introduced due to 276ad9121192Nilay Vaish
2015-11-03mem: hmc: top level designErfan Azarkhish
2015-11-03sparc: add missing parameter to makeSparcSystem()Palle Lyckegaard
2015-10-14ruby: profiler: provide the number of vnets through ruby systemNilay Vaish
2015-10-01config: Fix 'learning gem5' configs after SMT pushAndreas Hansson
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-09-30config,cpu: Add SMT support to Atomic and Timing CPUsMitch Hayenga
2015-09-25util: Fix minor issues in DRAM sweep scriptsAndreas Hansson
2015-09-16config: Add configs scripts used in Learning gem5Jason Lowe-Power
2015-09-06config: allow ruby to be used with Minor CPUNilay Vaish
2015-09-01ruby: remove random seedNilay Vaish
2015-08-30ruby: specify number of vnets for each protocolNilay Vaish
2015-08-21mem: Add explicit Cache subclass and make BaseCache abstractAndreas Hansson
2015-08-21ruby: Move Rubys cache class from Cache.py to RubyCache.pyAndreas Hansson
2015-08-19ruby: reverts to changeset: bf82f1f7b040Nilay Vaish
2015-08-14ruby: profiler: provide the number of vnets through ruby systemNilay Vaish
2015-08-14ruby: remove random seedNilay Vaish
2015-08-14ruby: Protocol changes for SimObject MessageBuffersJoel Hestness
2015-08-14ruby: Expose MessageBuffers as SimObjectsJoel Hestness
2015-08-14ruby: Remove the RubyCache/CacheMemory latencyJoel Hestness
2015-08-03misc: Coupling gem5 with SystemC TLM2.0Matthias Jung
2015-08-03ruby: correctly number the sequencer in MESI_Three_Level.pyNilay Vaish
2015-07-20config: add base class for ruby controllersDavid Hashe
2015-07-20ruby: initialize replacement policies with their own simobjsDavid Hashe
2015-07-21configs: network test: remove redundant physical memoryNilay Vaish
2015-07-10ruby: remove extra whitespace and correct misspelled wordsBrandon Potter
2015-07-04config: Update location of ruby topologies in helpDavid Hashe
2015-07-03mem: Remove redundant is_top_level cache parameterAndreas Hansson
2015-07-03mem: Allow read-only caches and check complianceAndreas Hansson
2015-06-01kvm, arm: Add support for aarch64Andreas Sandberg
2015-05-15config: Use null memory for DRAM sweep scriptAndreas Hansson
2015-05-15config: Add new MemConfig options to DRAM sweep scriptWendy Elsasser
2015-05-05arch, cpu: Do not forward snoops to table walkerAndreas Hansson
2015-04-29cpu: o3: replace issueLatency with bool pipelinedNilay Vaish
2015-04-23config: enable setting SE-mode environment variables from filebpotter
2015-04-20config: Remove memory aliases and rely on class nameAndreas Hansson
2015-04-14config, cpu: fix progress interval for switched CPUsMalek Musleh
2015-04-13cpu: re-organizes the branch predictor structure.Dibakar Gope
2015-04-08config: Support full-system with SST's memory systemCurtis Dunham
2015-03-27arm, configs: Do not forward snoops from I cacheAndreas Hansson
2015-03-23config: expand '~' and '~user' in pathsSteve Reinhardt
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-27 12:44:29 +0000