gem5 - gem5

Age	Commit message (Expand)	Author
2014-10-16	config: Add the ability to read a config file using C++ and Python	Andreas Hansson
2014-10-11	config: separate function for instantiating a memory controller	Nilay Vaish
2014-10-11	ruby: moesi hammer: correct typo in master-slave assignment	Nilay Vaish
2014-07-17	config, x86: Ensure that PCI devs get bridged to the memory bus	Jiuyue Ma
2014-07-17	config, x86: swap bus_id of ISA/PCI in X86 IntelMPTable	Jiuyue Ma
2014-09-20	mem: Rename Bus to XBar to better reflect its behaviour	Andreas Hansson
2014-09-20	cpu: Update DRAM traffic gen	Wendy Elsasser
2014-09-20	cpu: use probes infrastructure to do simpoint profiling	Dam Sunwoo
2014-09-03	arm: Support >2GB of memory for AArch64 systems	Ali Saidi
2014-09-03	arm: Assume we have a kernel that supports pci devices	Ali Saidi
2014-09-03	config: Refactor RealviewEMM to fit into new config system	Geoffrey Blake
2014-09-03	cpu: Change writeback modeling for outstanding instructions	Mitch Hayenga
2014-09-03	mem: Add utility script to plot DRAM efficiency sweep	Andreas Hansson
2014-09-01	ruby: message buffers: significant changes	Nilay Vaish
2014-09-01	ruby: Fixes clock domains in configuration files	Emilio Castillo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2014-08-10	config: Fix cache latency param in mem test	Radhika Jagtap
2014-07-28	arm: make the PseudoLRU tags the default for the O3_ARM_v7aL2	Anthony Gutierrez
2014-07-23	cpu: `Minor' in-order CPU model	Andrew Bardsley
2014-06-30	arm: make the bi-mode predictor the default for O3_ARM_v7a_BP	Anthony Gutierrez
2014-05-15	config: remove unecessary assignment of etherlink interfaces	Anthony Gutierrez
2014-05-09	config: Bump DRAM sweep bus speed to match DDR4 config	Andreas Hansson
2014-04-19	config: ruby: remove memory controller from network test	Nilay Vaish
2014-04-14	arm: set default kernels for VExpress_EMM and VExpress_EMM64	Anthony Gutierrez
2014-04-10	config: add num-work-ids command line option	Gedare Bloom
2014-04-01	configs: use SimpleMemory when using ruby in se mode	Nilay Vaish
2014-03-23	mem: Rename SimpleDRAM to a more suitable DRAMCtrl	Andreas Hansson
2014-03-23	mem: Change memory defaults to be more representative	Andreas Hansson
2014-03-23	config: Add a DRAM efficiency-sweep script	Andreas Hansson
2014-03-23	mem: More descriptive address-mapping scheme names	Andreas Hansson
2014-03-20	ruby: garnet: convert network interfaces into clocked objects	Nilay Vaish
2014-03-20	config: ruby: rename _cpu_ruby_ports to _cpu_ports	Nilay Vaish
2014-03-20	config: fs.py: move creating of test/drive systems to functions	Nilay Vaish
2014-03-20	config: remove ruby_fs.py	Nilay Vaish
2014-03-20	ruby: no piobus in se mode	Nilay Vaish
2014-03-17	config: ruby: remove piobus from protocols	Nilay Vaish
2014-02-24	ruby: correct errors in changeset 4eec7bdde5b0	Nilay Vaish
2014-02-23	ruby: route all packets through ruby port	Nilay Vaish
2014-02-23	config: topologies: slight code refactor	Nilay Vaish
2014-02-21	config: ruby_random_test: updates due to recent unrelated changes	Nilay Vaish
2014-02-18	arm: armv8 boot options to enable v8	Anthony Gutierrez
2014-02-18	mem: Add a wrapped DRAMSim2 memory controller	Andreas Hansson
2014-01-31	config: correct bug in x86 drive sys instantiation	Nilay Vaish
2014-01-28	x86: add a warning about the number of memory controllers	Nilay Vaish
2014-01-27	config: allow more than 3GB of memory for x86 simulations	Nilay Vaish
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2014-01-10	ruby: move all statistics to stats.txt, eliminate ruby.stats	Nilay Vaish
2014-01-04	ruby: add a three level MESI protocol.	Nilay Vaish
2014-01-04	ruby: rename MESI_CMP_directory to MESI_Two_Level	Nilay Vaish
2014-01-04	ruby: remove cntrl_id from python config scripts.	Nilay Vaish
2014-01-04	ruby: some small changes	Nilay Vaish