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2013-10-17util: Streamline .apc project convertsion scriptDam Sunwoo
This Python script generates an ARM DS-5 Streamline .apc project based on gem5 run. To successfully convert, the gem5 runs needs to be run with the context-switch-based stats dump option enabled (The guest kernel also needs to be patched to allow gem5 interrogate its task information.) See help for more information.
2013-10-17arm, config: Fix a small issue with the dtb file being specifiedAli Saidi
2013-10-17config: Fix memtest example scriptAli Saidi
2013-10-09config: correct example ruby scriptsNilay Vaish
A couple of recent changesets added/deleted/edited some variables that are needed for running the example ruby scripts. This changeset edits these scripts to bring them to a working state.
2013-10-07config: set cwd for processes in se.pyNilay Vaish
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones.
2013-09-30config: Add a 'kvm' CPU aliasAndreas Sandberg
Add a CPU alias, 'kvm', for the first available KVM-accelerated CPU model.
2013-09-17configs: Fix ruby_fs.py cache line sizeJoel Hestness
Recent changes added setting of system-wide cache line size and these settings occur in the top-level configs (se.py and fs.py). This setting also needs to take place in ruby_fs.py. This change sets the cache line size as appropriate.
2013-09-12config: Add voltage domain to Ruby example scriptsAndreas Hansson
This patch adds the minimum required voltage domain configuration to the Ruby example scripts.
2013-09-11config: Initialize and check cpt_starttickJoel Hestness
The previous changeset (9816) that fixes the use of max ticks introduced the variable cpt_starttick, which is used for setting the relative max tick. Unfortunately, with checkpointing at an instruction count or with simpoints, the checkpoint tick is not stored conveniently, so to ensure that cpt_starttick is initialized, set it to 0. Also, if using --rel-max-tick, check the use of instruction counts or simpoints to warn the user that the max tick setting does not include the checkpoint ticks.
2013-09-06ruby: network: correct naming of routersNilay Vaish
The routers are created before the network class. This results in the routers becoming children of the first link they are connected to and they get generic names like int_node and node_b. This patch creates the network object first and passes it to the topology creation function. Now the routers are children of the network object and names are much more sensible.
2013-08-26ARM: Fix configuration files for bare-metal binaries.Ali Saidi
2013-08-20ruby: add option for number of transitions per cycleNilay Vaish
The number of transitions per cycle that a controller can carry out is a proxy for the number of ports that a controller has. This value is currently 32 which is way too high. The patch introduces an option for the number of ports and uses this option in the protocol files to set the number of transitions. The default value is being set to 4. None of the se regressions change. Ruby stats for the fs regression change and are being updated.
2013-08-19config: Command line support for multi-channel memoryAndreas Hansson
This patch adds support for specifying multi-channel memory configurations on the command line, e.g. 'se/fs.py --mem-type=ddr3_1600_x64 --mem-channels=4'. To enable this, it enhances the functionality of MemConfig and moves the existing makeMultiChannel class method from SimpleDRAM to the support scripts. The se/fs.py example scripts are updated to make use of the new feature.
2013-08-19mem: Change AbstractMemory defaults to match the common caseAndreas Hansson
This patch changes the default parameter value of conf_table_reported to match the common case. It also simplifies the regression and config scripts to reflect this change.
2013-08-19power: Add voltage domains to the clock domainsAkash Bagdia
This patch adds the notion of voltage domains, and groups clock domains that operate under the same voltage (i.e. power supply) into domains. Each clock domain is required to be associated with a voltage domain, and the latter requires the voltage to be explicitly set. A voltage domain is an independently controllable voltage supply being provided to section of the design. Thus, if you wish to perform dynamic voltage scaling on a CPU, its clock domain should be associated with a separate voltage domain. The current implementation of the voltage domain does not take into consideration cases where there are derived voltage domains running at ratio of native voltage domains, as with the case where there can be on-chip buck/boost (charge pumps) voltage regulation logic. The regression and configuration scripts are updated with a generic voltage domain for the system, and one for the CPUs.
2013-08-19config: Move the memory instantiation outside FSConfigAndreas Hansson
This patch moves the instantiation of the memory controller outside FSConfig and instead relies on the mem_ranges to pass the information to the caller (e.g. fs.py or one of the regression scripts). The main motivation for this change is to expose the structural composition of the memory system and allow more tuning and configuration without adding a large number of options to the makeSystem functions. The patch updates the relevant example scripts to maintain the current functionality. As the order that ports are connected to the memory bus changes (in certain regresisons), some bus stats are shuffled around. For example, what used to be layer 0 is now layer 1. Going forward, options will be added to support the addition of multi-channel memory controllers.
2013-07-18Configs: Fix up maxtick and maxtimeJoel Hestness
This patch contains three fixes to max tick options handling in Options.py and Simulation.py: 1) Since the global simulator frequency isn't bound until m5.instantiate() is called, the maxtick resolution needs to happen after this call, since changes to the global frequency will cause m5.simulate() to misinterpret the maxtick value. Shuffling this also requires tweaking the checkpoint directory handling to signal the checkpoint restore tick back to run(). Fixing this completely and correctly will require storing the simulation frequency into checkpoints, which is beyond the scope of this patch. 2) The maxtick option in Options.py was defaulted to MaxTicks, so the old code would always skip over the maxtime part of the conditionals at the beginning of run(). Change the maxtick default to None, and set the maxtick local variable in run() appropriately. 3) To clarify whether max ticks settings are relative or absolute, split the maxtick option into separate options, for relative and absolute. Ensure that these two options and the maxtime option are handled appropriately to set the maxtick variable in Simulation.py.
2013-07-18config: Update script to set cache line size on systemAndreas Hansson
This patch changes the config scripts such that they do not set the cache line size per cache instance, but rather for the system as a whole.
2013-06-28configs: rearrange the available options in Options.pyNilay Vaish
It also changes the instantiation of physmem in se.py so as to make use of the memory size supplied by the mem_size option.
2013-06-28ruby: check for compatibility between mem size and num dirsNilay Vaish
The configuration scripts provided for ruby assume that the available physical memory is equally distributed amongst the directory controllers. But there is no check to ensure this assumption has been adhered to. This patch adds the required check.
2013-06-27sim: Add the notion of clock domains to all ClockedObjectsAkash Bagdia
This patch adds the notion of source- and derived-clock domains to the ClockedObjects. As such, all clock information is moved to the clock domain, and the ClockedObjects are grouped into domains. The clock domains are either source domains, with a specific clock period, or derived domains that have a parent domain and a divider (potentially chained). For piece of logic that runs at a derived clock (a ratio of the clock its parent is running at) the necessary derived clock domain is created from its corresponding parent clock domain. For now, the derived clock domain only supports a divider, thus ensuring a lower speed compared to its parent. Multiplier functionality implies a PLL logic that has not been modelled yet (create a separate clock instead). The clock domains should be used as a mechanism to provide a controllable clock source that affects clock for every clocked object lying beneath it. The clock of the domain can (in a future patch) be controlled by a handler responsible for dynamic frequency scaling of the respective clock domains. All the config scripts have been retro-fitted with clock domains. For the System a default SrcClockDomain is created. For CPUs that run at a different speed than the system, there is a seperate clock domain created. This domain incorporates the CPU and the associated caches. As before, Ruby runs under its own clock domain. The clock period of all domains are pre-computed, such that no virtual functions or multiplications are needed when calling clockPeriod. Instead, the clock period is pre-computed when any changes occur. For this to be possible, each clock domain tracks its children.
2013-06-27config: Rename clock option to Ruby clockAkash Bagdia
This patch changes the 'clock' option to 'ruby-clock' as it is only used by Ruby.
2013-06-27config: Add a system clock command-line optionAkash Bagdia
This patch adds a 'sys_clock' command-line option and use it to assign clocks to the system during instantiation. As part of this change, the default clock in the System class is removed and whenever a system is instantiated a system clock value must be set. A default value is provided for the command-line option. The configs and tests are updated accordingly.
2013-06-27config: Add a CPU clock command-line optionAkash Bagdia
This patch adds a 'cpu_clock' command-line option and uses the value to assign clocks to components running at the CPU speed (L1 and L2 including the L2-bus). The configuration scripts are updated accordingly. The 'clock' option is left unchanged in this patch as it is still used by a number of components. In follow-on patches the latter will be disambiguated further.
2013-06-27config: Remove redundant explicit setting of default clocksAkash Bagdia
This patch removes the explicit setting of the clock period for certain instances of CoherentBus, NonCoherentBus and IOCache where the specified clock is same as the default value of the system clock. As all the values used are the defaults, there are no performance changes. There are similar cases where the toL2Bus is set to use the parent CPU clock which is already the default behaviour. The main motivation for these simplifications is to ease the introduction of clock domains.
2013-06-13config: Do not instantiate membus when using rubyNilay Vaish
This patch moves the instantiation of system.membus in se.py to the area of code where classic memory system has been dealt with. Ruby does not require this bus and hence it should not be instantiated.
2013-06-03config: Add missing CPUs to --restore-with-cpuAndreas Sandberg
The --restore-with-cpu option didn't use CpuConfig.cpu_names() to determine which CPU names are valid, instead it used a static list of known CPU names. This changeset makes the option parsing code use the CPU list from the CpuConfig module instead.
2013-05-30mem: More descriptive DRAM config namesAndreas Hansson
This patch changes the class names of the variuos DRAM configurations to better reflect what memory they are based on. The speed and interface width is now part of the name, and also the alias that is used to select them on the command line. Some minor changes are done to the actual parameters, to better reflect the named configurations. As a result of these changes the regressions change slightly and the stats will be bumped in a separate patch.
2013-05-30mem: Add a LPDDR3-1600 configurationAndreas Hansson
This patch adds a typical (leaning towards fast) LPDDR3 configuration based on publically available data. As expected, it looks very similar to the LPDDR2-S4 configuration, only with a slightly lower burst time.
2013-05-30mem: Avoid explicitly zeroing the memory backing storeAndreas Hansson
This patch removes the explicit memset as it is redundant and causes the simulator to touch the entire space, forcing the host system to allocate the pages. Anonymous pages are mapped on the first access, and the page-fault handler is responsible for zeroing them. Thus, the pages are still zeroed, but we avoid touching the entire allocated space which enables us to use much larger memory sizes as long as not all the memory is actually used.
2013-05-21ruby: moesi hammer: cosmetic changesNilay Vaish
Updates copyright years, removes space at the end of lines, shortens variable names.
2013-05-21ruby: mesi cmp directory: cosmetic changesNilay Vaish
Updates copyright years, removes space at the end of lines, shortens variable names.
2013-05-21ruby: moesi cmp token: cosmetic changesNilay Vaish
Updates copyright years, removes space at the end of lines, shortens variable names.
2013-05-21ruby: moesi cmp directory: cosmetic changesNilay Vaish
Updates copyright years, removes space at the end of lines, shortens variable names.
2013-05-21configs: ruby: pass the option use_map to directory controllerNilay Vaish
The option was not being passed to directory controllers for the protocols MOESI_CMP_token and MOESI_CMP_directory. This was resulting in an error while instantiating the directory controller as it tries to access the wrong type of memory.
2013-05-14cpu: remove local/globalHistoryBits params from branch predAnthony Gutierrez
having separate params for the local/globalHistoryBits and the local/globalPredictorSize can lead to inconsistencies if they are not carefully set. this patch dervies the number of bits necessary to index into the local/global predictors based on their size. the value of the localHistoryTableSize for the ARM O3 CPU has been increased to 1024 from 64, which is more accurate for an A15 based on some correlation against A15 hardware.
2013-04-23config: Fix mem-type option not used in ruby_fs scriptMarco Elver
This fixes missing mem-type arguments to makeLinuxAlphaRubySystem and makeLinuxX86System after a recent changeset allowing mem-type to be configured via options missed fixing these calls. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2013-04-22config: Add a mem-type config option to se/fs scriptsAndreas Hansson
This patch enables selection of the memory controller class through a mem-type command-line option. Behind the scenes, this option is treated much like the cpu-type, and a similar framework is used to resolve the valid options, and translate the short-hand description to a valid class. The regression scripts are updated with a hardcoded memory class for the moment. The best solution going forward is probably to get the memory out of the makeSystem functions, but Ruby complicates things as it does not connect the memory controller to the membus. --HG-- rename : configs/common/CpuConfig.py => configs/common/MemConfig.py
2013-04-22config: Add a KVM VM to systems with KVM CPUsAndreas Sandberg
KVM-based CPUs need a KVM VM object in the system to manage system-global KVM stuff (VM creation, interrupt delivery, memory managment, etc.). This changeset adds a VM to the system if KVM has been enabled at compile time (the BaseKvmCPU object exists) and a KVM-based CPU has been selected at runtime.
2013-04-22cpu: generate SimPoint basic block vector profilesDam Sunwoo
This patch is based on http://reviews.m5sim.org/r/1474/ originally written by Mitch Hayenga. Basic block vectors are generated (simpoint.bb.gz in simout folder) based on start and end addresses of basic blocks. Some comments to the original patch are addressed and hooks are added to create and resume from checkpoints based on instruction counts dictated by external SimPoint analysis tools. SimPoint creation/resuming options will be implemented as a separate patch.
2013-04-17config: ruby network test: remove piobus checkNilay Vaish
2013-04-09Configs: Fix handling of maxtick and take_checkpointsJoel Hestness
In Simulation.py, calls to m5.simulate(num_ticks) will run the simulated system for num_ticks after the current tick. Fix calls to m5.simulate in scriptCheckpoints() and benchCheckpoints() to appropriately handle the maxticks variable.
2013-04-02rcs scripts: remove bbench.rcSAnthony Gutierrez
this run script shouldn't be used; bbench-ics.rcS or bbench-gb.rcS should be used instead.
2013-03-28x86: create space in bios memory mapNilay Vaish
As of now, we mark the top 1MB of memory space as unusable. Part of it is actually usable and is required to be marked so by some of the newer versions of linux kernel. This patch marks the top 639KB as usable. This value was chosen by looking at QEMU's output for bios memory map.
2013-03-22config: return exit event instead of causeNilay Vaish
changeset: a4739b6f799d made some changes that where an exit event should have been returned in place of exit cause. This patch corrects the error.
2013-03-22ruby: convert Topology to regular classNilay Vaish
The Topology class in Ruby does not need to inherit from SimObject class. This patch turns it into a regular class. The topology object is now created in the constructor of the Network class. All the parameters for the topology class have been moved to the network class.
2013-03-22ruby: network: move routers from topology to networkNilay Vaish
2013-03-06ruby: remove the functional copy of memory in se modeNilay Vaish
This patch removes the functional copy of the memory that was maintained in the se mode. Now ruby itself will provide the data.
2013-03-06ruby: garnet: fixed: implement functional accessNilay Vaish