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AgeCommit message (Expand)Author
2011-05-04ARM: Configure bootloader parametersAli Saidi
2011-04-28network: basic link bw for garnet and simple networksBrad Beckmann
2011-04-28network: convert links & switches to first class C++ SimObjectsBrad Beckmann
2011-04-20python: fix another bug from changes to main.pyNathan Binkert
2011-04-04ARM: Include IDE/CF controller by default in PBX model.Ali Saidi
2011-04-04Sim: Fix Simulation.py to allow more than 1 core for standard switching.Anthony Gutierrez
2011-03-28This patch supports cache flushing in MOESI_hammerSomayeh Sardashti
2011-03-28Config: Import math in MI_example.pyNilay Vaish
2011-03-25ruby: fixed cache index settingBrad Beckmann
2011-03-21This patch adds the network tester for simple and garnet networks.Tushar Krishna
2011-03-19configs: combine ruby_se.py and se.py to avoid all that code duplicationLisa Hsu
2011-03-19enable x86 workloads on se.pyLisa Hsu
2011-03-19se.py: Modify script to make multiprogramming much easier.Lisa Hsu
2011-03-17ARM: Bare metal system should have 256MB of RAM.Ali Saidi
2011-03-17Mem: Fix issue with dirty block being lost when entire block transferred to n...Ali Saidi
2011-02-24Configs: Explicitly import env in Benchmarks.pyGabe Black
2011-02-23ARM: Clarifies creation of Linux and baremetal ARM systems.Ali Saidi
2011-02-23configs: cache: add cache line size optionKorey Sewell
2011-02-23configs: set default cache paramsKorey Sewell
2011-02-11VNC: Add VNC server to M5Ali Saidi
2011-02-08memtest: due to contention increase, increased deadlock thresholdBrad Beckmann
2011-02-08config: fixed minor bug connecting dma devices to rubyBrad Beckmann
2011-02-07X86, Config: Move the setting of work count options to a separate function.Gabe Black
2011-02-06boot: script that creates a checkpoint after Linux boot upBrad Beckmann
2011-02-06ruby: numa bit fix for sparse memoryBrad Beckmann
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-02-06ruby: x86 fs config supportBrad Beckmann
2011-02-06MOESI_hammer: Added full-bit directory supportBrad Beckmann
2011-02-03Mem,X86: Make the IO bridge pass APIC messages back towards the CPU.Gabe Black
2011-02-03Config: Keep track of uncached and cached ports separately.Gabe Black
2011-02-02X86: Change how the default disk image gets set up.Gabe Black
2011-02-01X86: Add L1 caches for the TLB walkers.Gabe Black
2011-01-19Time: Add a mechanism to prevent M5 from running faster than real time.Gabe Black
2011-01-10ruby: get rid of ruby's Debug.hhNathan Binkert
2011-01-03Ruby: Add option for random seed to Ruby.pyNilay Vaish
2010-12-07Configs: Automatically choose the correct hello world binary.Ali Saidi
2010-11-17Config: Change misleading "cycle" message to say "tick".Gabe Black
2010-11-15ARM: Add support for a dumb IDE controllerAli Saidi
2010-11-08Mem: Finish half-baked support for mmaping file in physmem.Ali Saidi
2010-10-22Configs: Stop setting the "mem" parameter in splash2 config files.Gabe Black
2010-08-30config: fixed numa high bit setting bugBrad Beckmann
2010-08-30config: minor fix to probe filter index settingBrad Beckmann
2010-08-29ruby: None, not noneNathan Binkert
2010-08-25memtest: scale associativity and mshrs according to configSteve Reinhardt
2010-08-24config: changed ruby config file names to be consistentBrad Beckmann
2010-08-24config: remove ruby's requirement on the timing cmd line paramBrad Beckmann
2010-08-24config: fixed ruby dma device connectionsBrad Beckmann
2010-08-24testers: move testers to a new directoryBrad Beckmann
2010-08-23ARM: Add configuration for Linux/Full SystemAli Saidi
2010-08-20ruby: Recycle latency fix for hammerBrad Beckmann
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