| Age | Commit message (Expand) | Author |
|---|
| 2018-10-08 | dev, arm: remove the RealViewEB platform | Ciro Santilli |
| 2018-09-17 | config, arm, power: Example to report the power for the L2 Cache | Sherif Elhabbal |
| 2018-09-12 | config, dev-arm: Fix UART handling baremetal mode | Ciro Santilli |
| 2018-09-12 | cpu: Replace the fastmem with a new CPU model | Andreas Sandberg |
| 2018-09-10 | configs: Use the same address ranges for dir and mem_ctrls | Nikos Nikoleris |
| 2018-09-03 | config: Move KVM CPU checking to CpuConfig helper module | Andreas Sandberg |
| 2018-08-17 | configs: Always exit with code 0 | Jason Lowe-Power |
| 2018-07-13 | configs: Update the DRAM sweep script to use PyTrafficGen | Andreas Sandberg |
| 2018-05-31 | mem-cache: Add a non-coherent cache | Nikos Nikoleris |
| 2018-05-16 | style: fix amd license and style issues | Tony Gutierrez |
| 2018-04-12 | configs, mem-ruby: fix issues with style in AMD license | Tony Gutierrez |
| 2018-03-23 | learning_gem5: Add a simple config for MI_example | Jason Lowe-Power |
| 2018-03-23 | learning_gem5: Ruby random tester files for MSI | Jason Lowe-Power |
| 2018-03-23 | learning_gem5: Add config files for MSI protocol | Jason Lowe-Power |
| 2018-03-22 | mem-cache: Split array indexing and replacement policies. | Daniel R. Carvalho |
| 2018-03-20 | arch-arm, configs: Treat the bootloader rom as cacheable memory | Nikos Nikoleris |
| 2018-03-13 | learning_gem5: Update README for Learning gem5 | Jason Lowe-Power |
| 2018-03-06 | config: Switch from the print statement to the print function. | Gabe Black |
| 2018-03-02 | configs: Fix L3Cache instantiation in lat_mem_rd.py | Nikos Nikoleris |
| 2018-02-05 | config: remove dead code in fs.py | Nayan Deshmukh |
| 2018-01-29 | config, arm: enable device tree autogeneration for bigLITTLE | Curtis Dunham |
| 2018-01-29 | config: Embed Device Tree generation in fs.py config | Glenn Bergmans |
| 2018-01-10 | configs: Fill in the cpu.isa field in etrace_replay.py since no default are p... | Chen Zou |
| 2018-01-08 | gpu-compute: call createThreads() on cpu objs in apu_se.py | Tony Gutierrez |
| 2018-01-02 | config: Handle NULL simobject parameters in read_config.py. | Gabe Black |
| 2018-01-02 | config: Fix parsing AddrRange parameters in read_config.py. | Gabe Black |
| 2018-01-02 | config: Add a --checkpoint-dir argument to read_config.py. | Gabe Black |
| 2017-12-15 | mem-ruby: Support atomic_noncaching acceses in ruby | Swapnil Haria |
| 2017-12-12 | config: Fix need to set ISA of switch cpus. | Austin Harris |
| 2017-12-05 | config, mem, hmc: fix HMC test script | Éder F. Zulian |
| 2017-12-05 | learning_gem5: Adding code for SimpleCache | Jason Lowe-Power |
| 2017-12-05 | learning_gem5: Adds the simple MemObject code | Jason Lowe-Power |
| 2017-12-05 | learning_gem5: Add code for hello-goodbye example | Jason Lowe-Power |
| 2017-12-05 | learning_gem5: Add code for simple SimObject | Jason Lowe-Power |
| 2017-11-16 | tests: Add tests for DRAM low power modes | Radhika Jagtap |
| 2017-11-16 | config: Add low power sweep for DRAM | Radhika Jagtap |
| 2017-11-13 | config: Fix the "script" SysPath functor. | Gabe Black |
| 2017-10-31 | config: Rework the SysPaths functions into functors. | Gabe Black |
| 2017-08-03 | configs, arm: Fix incorrect use of mem_range in bL example | Andreas Sandberg |
| 2017-08-03 | arm, config: Fix CPU names in ARM example configs | Andreas Sandberg |
| 2017-08-01 | arch-arm: Switch to DTOnly as the default machine type | Andreas Sandberg |
| 2017-07-28 | config: Discover CPU timing models based on target ISA | Andreas Sandberg |
| 2017-07-27 | config, arm: SE configuration for the ARM starter kit | Gabor Dozsa |
| 2017-07-27 | config, arm: FS configuration for the ARM starter kit | Gabor Dozsa |
| 2017-07-27 | config, arm: Add a high-performance in order timing model | Ashkan Tousi |
| 2017-07-27 | config: Change mem_range attribute naming in ARM SimpleSystem | Gabor Dozsa |
| 2017-07-25 | configs,sim-se: fix se.py multi-cpu multi-cmd issue | Pau Cabre |
| 2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
| 2017-07-04 | config, arm: Don't import timing models for missing CPUs | Andreas Sandberg |
| 2017-07-03 | config: Clean up core timing model discovery | Andreas Sandberg |
