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AgeCommit message (Expand)Author
2014-10-29arm, tests: Update config files to more recent kernels and create 64-bit regr...Ali Saidi
2014-10-29arm: fix bare-metal memory setup.Ali Saidi
2014-10-16config: Add the ability to read a config file using C++ and PythonAndreas Hansson
2014-10-11config: separate function for instantiating a memory controllerNilay Vaish
2014-10-11ruby: moesi hammer: correct typo in master-slave assignmentNilay Vaish
2014-07-17config, x86: Ensure that PCI devs get bridged to the memory busJiuyue Ma
2014-07-17config, x86: swap bus_id of ISA/PCI in X86 IntelMPTableJiuyue Ma
2014-09-20mem: Rename Bus to XBar to better reflect its behaviourAndreas Hansson
2014-09-20cpu: Update DRAM traffic genWendy Elsasser
2014-09-20cpu: use probes infrastructure to do simpoint profilingDam Sunwoo
2014-09-03arm: Support >2GB of memory for AArch64 systemsAli Saidi
2014-09-03arm: Assume we have a kernel that supports pci devicesAli Saidi
2014-09-03config: Refactor RealviewEMM to fit into new config systemGeoffrey Blake
2014-09-03cpu: Change writeback modeling for outstanding instructionsMitch Hayenga
2014-09-03mem: Add utility script to plot DRAM efficiency sweepAndreas Hansson
2014-09-01ruby: message buffers: significant changesNilay Vaish
2014-09-01ruby: Fixes clock domains in configuration filesEmilio Castillo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2014-08-10config: Fix cache latency param in mem testRadhika Jagtap
2014-07-28arm: make the PseudoLRU tags the default for the O3_ARM_v7aL2Anthony Gutierrez
2014-07-23cpu: `Minor' in-order CPU modelAndrew Bardsley
2014-06-30arm: make the bi-mode predictor the default for O3_ARM_v7a_BPAnthony Gutierrez
2014-05-15config: remove unecessary assignment of etherlink interfacesAnthony Gutierrez
2014-05-09config: Bump DRAM sweep bus speed to match DDR4 configAndreas Hansson
2014-04-19config: ruby: remove memory controller from network testNilay Vaish
2014-04-14arm: set default kernels for VExpress_EMM and VExpress_EMM64Anthony Gutierrez
2014-04-10config: add num-work-ids command line optionGedare Bloom
2014-04-01configs: use SimpleMemory when using ruby in se modeNilay Vaish
2014-03-23mem: Rename SimpleDRAM to a more suitable DRAMCtrlAndreas Hansson
2014-03-23mem: Change memory defaults to be more representativeAndreas Hansson
2014-03-23config: Add a DRAM efficiency-sweep scriptAndreas Hansson
2014-03-23mem: More descriptive address-mapping scheme namesAndreas Hansson
2014-03-20ruby: garnet: convert network interfaces into clocked objectsNilay Vaish
2014-03-20config: ruby: rename _cpu_ruby_ports to _cpu_portsNilay Vaish
2014-03-20config: fs.py: move creating of test/drive systems to functionsNilay Vaish
2014-03-20config: remove ruby_fs.pyNilay Vaish
2014-03-20ruby: no piobus in se modeNilay Vaish
2014-03-17config: ruby: remove piobus from protocolsNilay Vaish
2014-02-24ruby: correct errors in changeset 4eec7bdde5b0Nilay Vaish
2014-02-23ruby: route all packets through ruby portNilay Vaish
2014-02-23config: topologies: slight code refactorNilay Vaish
2014-02-21config: ruby_random_test: updates due to recent unrelated changesNilay Vaish
2014-02-18arm: armv8 boot options to enable v8Anthony Gutierrez
2014-02-18mem: Add a wrapped DRAMSim2 memory controllerAndreas Hansson
2014-01-31config: correct bug in x86 drive sys instantiationNilay Vaish
2014-01-28x86: add a warning about the number of memory controllersNilay Vaish
2014-01-27config: allow more than 3GB of memory for x86 simulationsNilay Vaish
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2014-01-10ruby: move all statistics to stats.txt, eliminate ruby.statsNilay Vaish
2014-01-04ruby: add a three level MESI protocol.Nilay Vaish
2014-01-04ruby: rename MESI_CMP_directory to MESI_Two_LevelNilay Vaish