gem5 - gem5

Age	Commit message (Collapse)	Author
2003-12-06	Various cleanup. Mostly forcing initialization of some fields...	Steve Reinhardt
	I noticed that checkpoints dumped from m5.debug and m5.opt had differences, which is no longer the case (other than addresses encoded in names). cpu/full_cpu/smt.hh: Get rid of unused SMT_MAX_CPUS. sim/debug.cc: Use AutoDelete for DebugBreakEvent. sim/serialize.cc: sim/serialize.hh: Move constructor & destructor to header so they can be inlined. --HG-- extra : convert_revision : bc68c2c9b053b1de0d655ed555734419fafd0b83
2003-10-10	File moves for the reorg. Tree is in broken state until I commit the ↵	Steve Reinhardt
	makefile and #include changes. --HG-- rename : sim/cache/lzss_compression.cc => base/compression/lzss_compression.cc rename : sim/cache/lzss_compression.hh => base/compression/lzss_compression.hh rename : sim/cache/null_compression.hh => base/compression/null_compression.hh rename : sim/hybrid_pred.cc => base/hybrid_pred.cc rename : sim/hybrid_pred.hh => base/hybrid_pred.hh rename : base/aout_object.cc => base/loader/aout_object.cc rename : base/aout_object.hh => base/loader/aout_object.hh rename : base/coff_sym.h => base/loader/coff_sym.h rename : base/coff_symconst.h => base/loader/coff_symconst.h rename : base/ecoff_object.cc => base/loader/ecoff_object.cc rename : base/ecoff_object.hh => base/loader/ecoff_object.hh rename : base/elf_object.cc => base/loader/elf_object.cc rename : base/elf_object.hh => base/loader/elf_object.hh rename : base/exec_aout.h => base/loader/exec_aout.h rename : base/exec_ecoff.h => base/loader/exec_ecoff.h rename : base/object_file.cc => base/loader/object_file.cc rename : base/object_file.hh => base/loader/object_file.hh rename : base/symtab.cc => base/loader/symtab.cc rename : base/symtab.hh => base/loader/symtab.hh rename : sim/predictor.hh => base/predictor.hh rename : sim/sat_counter.cc => base/sat_counter.cc rename : sim/sat_counter.hh => base/sat_counter.hh rename : sim/base_cpu.cc => cpu/base_cpu.cc rename : sim/base_cpu.hh => cpu/base_cpu.hh rename : sim/exec_context.cc => cpu/exec_context.cc rename : sim/exec_context.hh => cpu/exec_context.hh rename : sim/exetrace.cc => cpu/exetrace.cc rename : sim/exetrace.hh => cpu/exetrace.hh rename : sim/op_class.hh => cpu/full_cpu/op_class.hh rename : sim/smt.hh => cpu/full_cpu/smt.hh rename : sim/inst_seq.hh => cpu/inst_seq.hh rename : sim/intr_control.cc => cpu/intr_control.cc rename : sim/intr_control.hh => cpu/intr_control.hh rename : sim/memtest.cc => cpu/memtest/memtest.cc rename : sim/memtest.hh => cpu/memtest/memtest.hh rename : sim/pc_event.cc => cpu/pc_event.cc rename : sim/pc_event.hh => cpu/pc_event.hh rename : sim/simple_cpu.cc => cpu/simple_cpu/simple_cpu.cc rename : sim/simple_cpu.hh => cpu/simple_cpu/simple_cpu.hh rename : sim/static_inst.cc => cpu/static_inst.cc rename : sim/static_inst.hh => cpu/static_inst.hh extra : convert_revision : 05bd41acb2a424f1a38609fd4ac6df681bb479d6