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2006-05-04O3 CPU now handles being used with the sampler.Kevin Lim
cpu/o3/2bit_local_pred.cc: cpu/o3/2bit_local_pred.hh: cpu/o3/bpred_unit.hh: cpu/o3/bpred_unit_impl.hh: cpu/o3/btb.cc: cpu/o3/btb.hh: cpu/o3/commit.hh: cpu/o3/commit_impl.hh: cpu/o3/cpu.cc: cpu/o3/cpu.hh: cpu/o3/decode.hh: cpu/o3/decode_impl.hh: cpu/o3/fetch.hh: cpu/o3/fetch_impl.hh: cpu/o3/fu_pool.cc: cpu/o3/fu_pool.hh: cpu/o3/iew.hh: cpu/o3/iew_impl.hh: cpu/o3/inst_queue.hh: cpu/o3/inst_queue_impl.hh: cpu/o3/lsq.hh: cpu/o3/lsq_impl.hh: cpu/o3/lsq_unit.hh: cpu/o3/lsq_unit_impl.hh: cpu/o3/mem_dep_unit.hh: cpu/o3/mem_dep_unit_impl.hh: cpu/o3/ras.cc: cpu/o3/ras.hh: cpu/o3/rename.hh: cpu/o3/rename_impl.hh: cpu/o3/rob.hh: cpu/o3/rob_impl.hh: cpu/o3/sat_counter.cc: cpu/o3/sat_counter.hh: cpu/o3/thread_state.hh: Handle switching out and taking over. Needs to be able to reset all state. cpu/o3/alpha_cpu_impl.hh: Handle taking over from another XC. --HG-- extra : convert_revision : b936e826f0f8a18319bfa940ff35097b4192b449
2006-04-22Updates for O3 model.Kevin Lim
arch/alpha/isa/decoder.isa: Make IPR accessing instructions serializing so they are not issued incorrectly in the O3 model. arch/alpha/isa/pal.isa: Allow IPR instructions to have flags. base/traceflags.py: Include new trace flags from the two new CPU models. cpu/SConscript: Create the templates for the split mem accessor methods. Also include the new files from the new models (the Ozone model will be checked in next). cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: Update to the BaseDynInst for the new models. --HG-- extra : convert_revision : cc82db9c72ec3e29cea4c3fdff74a3843e287a35