summaryrefslogtreecommitdiff
path: root/cpu
AgeCommit message (Collapse)Author
2004-05-21rename namespace Statistics to StatsNathan Binkert
--HG-- extra : convert_revision : 28f1703f8d7d8cf33fb952ae450f66bdba860fb7
2004-05-18merge m5 with linux for the event and binning liftingLisa Hsu
--HG-- extra : convert_revision : 09d3678746c2e9a93a9982dc75d5e1ac309cb2fa
2004-05-17Significant changes to ISA description to completely factorSteve Reinhardt
out CPU model. ISA description now generates multiple output source files to (in theory) reduce compilation time. arch/alpha/isa_desc: Update for parser changes. Move most constructors out of class declarations (which are now in decoder.hh) and into decoder.cc. Move all execute() methods into exec output. arch/isa_parser.py: Significant changes to make ISA description completely independent of CPU model, and isolate model-dependent parts of parser into one little class (CpuModel). Also split up code output into multiple files (a header, a main source file, and per-cpu execute() method files). Noticeable changes to language as a result. See updated Doxygen documentation. cpu/simple_cpu/simple_cpu.hh: SimpleCPUExecContext typedef no longer needed. Add forward declaration of Process. cpu/static_inst.hh: SimpleCPUExecContext and FullCPUExecContext typedefs no longer needed. Make eaCompInst() and memAccInst() return const refs. --HG-- extra : convert_revision : 71471f267804fafd0a881bac7445677e76334daf
2004-05-13remove the annotation junkNathan Binkert
arch/alpha/isa_desc: remove the annotation junk Move some code to AlphaPseudo where it belongs arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: remove the annotation junk add pseudo instruction code that was previously misplaced --HG-- extra : convert_revision : 97db8402aa34e0bdf044b138c52331fc9e714986
2004-05-12Make a new stat type of Value which is a scalar stat thatNathan Binkert
proxies for a real C/C++ scalar value or scalar functor. This replaces the scalar() and functor() terms that were previously used in formulas. This helps when dumping statistics because the formulas are not supposed to change. cpu/base_cpu.cc: Add a number of cycles stat to the cpu object that tracks the number of cycles that the cpu has executed. This starts to pave the way for cpu cycles being different from event ticks. cpu/base_cpu.hh: provide a functor for calculating all simulated instructions of all CPUs and a virtual function for determining that number. To deal with the change from functor() to Value::functor() cpu/simple_cpu/simple_cpu.cc: simTicks -> numCycles numInsts is now a real Scalar stat, not a Formula cpu/simple_cpu/simple_cpu.hh: numInsts is now a real Scalar stat, not a Formula count all instructions sim/stat_control.cc: simInsts, simTicks, hostMemory, and hostSeconds are no longer Statistics::Formula but rather Statistics::Value add new stat for tick frequency sim/stats.hh: don't need everything to be extern. test/Makefile: Make stuff work a tad bit better test/stattest.cc: test out Statistics::Value --HG-- extra : convert_revision : c812e8baa2b17c08abf3a68ed1e1125dc6f2cfb4
2004-05-11first pass at merging m5 with linuxLisa Hsu
--HG-- extra : convert_revision : dfe23349b80ae3b34d3cb95c5734e01ef62f700e
2004-05-10Do a better job of factoring out CPU model in ISA description.Steve Reinhardt
(Still not perfect though.) arch/alpha/isa_desc: Do a better job of factoring out CPU model. (Still not perfect though.) Pull execute() methods out of class declarations into separate section of file, allowing (1) easier replication for different CPU models and (2) a path to putting them all in a separate file. Force all instruction execution context into a single model-dependent class (SimpleCPU itself for SimpleCPU, DynInst for FullCPU). arch/isa_parser.py: Do a better job of factoring out CPU model. (Still not perfect though.) Pull execute() methods out of class declarations into separate section of file, allowing (1) easier replication for different CPU models and (2) a path to putting them all in a separate file. Also restructure top level to allow parser to run under interactive interpreter session for easier debugging. cpu/exec_context.hh: Add a few new methods to clean up isa_desc. cpu/simple_cpu/simple_cpu.cc: cpu/static_inst.hh: StaticInst::execute no longer takes a CPU and an ExecContext, just a unified FooCPUExecContext. cpu/simple_cpu/simple_cpu.hh: Add methods to redirect calls to ExecContext so SimpleCPU can act as sole instruction execution context for itself. Typedef SimpleCPU to SimpleCPUExecContext. --HG-- extra : convert_revision : ecc445503bc585585da5663fe61796580e744da6
2004-05-06Whole mess'o'changes.. see individual filesAndrew Schultz
arch/alpha/vtophys.cc: Removed buggy code that tries to fix PAL addresses (may cause problems while trying to debug in PAL code, but that should do this fix outside of vtophys) base/loader/symtab.cc: base/loader/symtab.hh: cpu/exetrace.cc: Changed InstExec traces to always print a symbol name dev/ide_ctrl.cc: dev/ide_disk.cc: Tabs dev/ide_disk.hh: Change buffer size dev/tsunami_pchip.cc: Fix translatePciToDma to support scatter gather mapping kern/linux/linux_system.cc: Force simulator to wait until remote debugger attaches (should be removed or turned on/off with a flag) --HG-- extra : convert_revision : 1d08aebe3f448c87a963dd613de3e2e0cff0d48d
2004-05-04Major stats package cleanupNathan Binkert
Add support for generic visitors for stats and use them to implement independent output functions. Support for mysql output and some initial code for hacking on mysql output with python arch/alpha/pseudo_inst.cc: base/hybrid_pred.cc: base/hybrid_pred.hh: base/sat_counter.cc: base/sat_counter.hh: cpu/simple_cpu/simple_cpu.cc: kern/tru64/tru64_events.cc: sim/main.cc: sim/process.cc: sim/process.hh: sim/sim_events.cc: sim/sim_object.cc: sim/system.hh: update for changes in stats package base/statistics.cc: move the python output code to base/stats/puthon.(cc|hh) and reimplement it as a visitor. move the text output code to base/stats/text.(cc|hh) and reimplement it as a visitor. move the database stuff into base/stats/statdb.(cc|hh) and get rid of the class. Put everything as globals in the Statistics::Database namespace. allocate unique ids for all stats. directly implement the check routine and get rid of the various dumping routines since they're now in separate files. make sure that no two stats have the same name clean up some loops base/statistics.hh: major changes to the statistics package again lots of code was factored out of statistics.hh into several separate files in base/stats/ (this will continue) There are now two Stat package types Result and Counter that are specified to allow the user to keep the counted type separate from the result type. They are currently both doubles but that's an experiment. There is no more per stat ability to set the type. Statistics::Counter is not the same as Counter! Implement a visitor for statistics output so that new output types can be implemented independently from the stats package itself. Add a unique id to each stat so that it can be used to keep track of stats more simply. This number can also be used in debugging problems with stats. Tweak the bucket size stuff a bit to make it work better. fixed VectorDist size bug cpu/memtest/memtest.cc: Fix up for changes in stats package Don't use value() since it doesn't work with binning. If you want a number as a stat, and to use it in the program itself, you really want two separate variables, one that's a stat, and one that's not. cpu/memtest/memtest.hh: Fix up for changes in stats package test/Makefile: Try to build stuff now that directories matter test/stattest.cc: test all new output types choose which one with command line options --HG-- extra : convert_revision : e3a3f5f0828c67c0e2de415d936ad240adaddc89
2004-04-03More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL).Steve Reinhardt
Also missed renames in a bunch of config files somehow. (See previous changeset for list of renames.) arch/alpha/alpha_memory.cc: arch/alpha/ev5.cc: arch/alpha/faults.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/simple_cpu/simple_cpu.hh: More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL). --HG-- extra : convert_revision : b2c6ca0916b72b59895520fcacaf028667560a0d
2004-04-02Basic cleanup pass to get rid of a few things that made the PythonSteve Reinhardt
configuration unnecessarily awkward. Biggest changes are: - External and internal object names now match in all cases. The macros still allow them to be different; the only reason I didn't get rid of that is that the macros themselves should be going away soon. In the few conflicting cases, I sometimes renamed the C++ object and sometimes renamed the config object. The latter sets of substitions are: s/BaseBus/Bus/; s/MemoryObject/FunctionalMemory/; s/MemoryControl/MemoryController/; s/FUPool/FuncUnitPool/; - SamplingCPU is temporarily broken... we need to change the model of how this works in the .ini file. Having it as a CPU proxy is really awkward. arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: cpu/simple_cpu/simple_cpu.cc: sim/process.cc: Rename objects to match config name. cpu/base_cpu.cc: Uncomment SimObject define since SamplingCPU no longer does this for us. dev/ethertap.cc: Use unsigned instead of uint16_t for params. kern/tru64/tru64_system.cc: Use unsigned instead of uint64_t for init_param param. test/paramtest.cc: Fix old SimObjectParam. --HG-- extra : convert_revision : 378ebbc6a71ad0694501d09979a44d111a59e8dc
2004-03-24Minor cleanup from building & diffing behaviorSteve Reinhardt
on various platforms. base/hashmap.hh: gcc on Alpha doesn't always define __LP64__, even though it arguably should. cpu/exec_context.cc: Clear register file on non-full-system too (even though it typically gets overwritten by the initial regs from the Process object). sim/process.cc: Clear initial register copy in Process object. Not all regs get initialized when the executable is loaded. --HG-- extra : convert_revision : f1fe4734a5ea81331d70994cb5284b1e9db0dceb
2004-03-11merge with m5 headLisa Hsu
--HG-- extra : convert_revision : c90339248d1ee74df1c6b90a77ec9ea41f646311
2004-03-05fix ALPHALisa Hsu
cpu/exec_context.cc: put this code between #ifdef FULL_SYSTEM --HG-- extra : convert_revision : b934c7085d2a4337149ab8180a7d50851fbbf170
2004-03-05changes that affect post checkpoint runs.Lisa Hsu
cpu/exec_context.cc: you can't delete an element of an array that you newed. oops. kern/tru64/tru64_events.cc: changes to reflect .ini changes, and also b/c es_intr and ipintr can happen at ANY point, even within a current calling path being tracked. sim/system.cc: can't delete an element of a newed array. must new them separately. --HG-- extra : convert_revision : 21573327b7b7f20bf9a3fcfb5854526433e17e17
2004-03-05nother fixLisa Hsu
cpu/exec_context.cc: nother little bug...forgot to pop off stack as i read off it sim/system.cc: forgot to pop off stack as i read off it --HG-- extra : convert_revision : d1f691c0a9f0fa22281c717ee465d8a5f1e45c13
2004-03-05serialization for binning. it is WAAAAAAAY past my bedtime.Lisa Hsu
cpu/exec_context.cc: sim/system.cc: sim/system.hh: serialization for binning --HG-- extra : convert_revision : f8417794a3a5ec7f2addc9c2da0f48e851899112
2004-03-04AutomergedErik Hallnor
--HG-- extra : convert_revision : 7b56535ee32551f27db8d98172159f63e5099835
2004-03-04Copy implementationsErik Hallnor
arch/alpha/isa_desc: Need to return fault for copy operations. cpu/exec_context.hh: Add temporary storage to pass source address from copy load to copy store cpu/simple_cpu/simple_cpu.cc: Implement copy functions. cpu/simple_cpu/simple_cpu.hh: Return fault --HG-- extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90
2004-02-29Fix the swichover code. It's only for FULL_SYSTEMNathan Binkert
cpu/base_cpu.cc: #ifdef FULL_SYSTEM --HG-- extra : convert_revision : 427ee93d545596da00d6c4688a7e32d584054948
2004-02-29fix switchover WRT interruptsNathan Binkert
cpu/base_cpu.cc: gah! copy the interrupt status on switchover --HG-- extra : convert_revision : d3199a7409a494b7687354c43ffca697f37e8456
2004-02-29Initial cleanup pass of lisa's function call trackingNathan Binkert
code. base/statistics.hh: We're getting rid of FS_MEASURE, but for now, we're going to still use a compile time flag to turn on and off binning of statistics. (The flag is STATS_BINNING) cpu/exec_context.cc: cpu/exec_context.hh: kern/tru64/tru64_system.cc: get rid of FS_MEASURE cpu/simple_cpu/simple_cpu.cc: yank the function call tracking code out of the cpu and move it into the software context class itself. kern/tru64/tru64_system.hh: get rid of FS_MEASURE move all of the tacking stuff to the same place. sim/system.hh: cleanup --HG-- extra : convert_revision : 73d3843afe1b3ba0d5445421c39c1148d3f4e7c0
2004-02-27Added copy instructions to the ISA. Well it didn't break anything yet...Erik Hallnor
arch/alpha/isa_desc: Add copy_load and copy_store insts (ldf and stf respectively) cpu/simple_cpu/simple_cpu.hh: Add copy functions to SimpleCPU as well --HG-- extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d
2004-02-27Initial copy support in the pipeline. Add copypal counting.Erik Hallnor
arch/alpha/osfpal.cc: Add a string for copypal. arch/alpha/osfpal.hh: Add a code for copypal. cpu/static_inst.hh: Add an IsCopy flag. --HG-- extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f
2004-02-26Make SW prefetch flag a parameter again, and add code to makeSteve Reinhardt
it actually do something on FullCPU. Still disabled, as it causes detailed-boot to hang when you turn it on. arch/alpha/isa_desc: Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst. cpu/simple_cpu/simple_cpu.hh: Changed prefetch() return type from Fault to void. --HG-- extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7
2004-02-24add in an init() callback for CPU's so that no stats are accessed prior to ↵Lisa Hsu
the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process). cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: same thing for simple cpu's. --HG-- extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662
2004-02-20make uncacheable stuff happen againNathan Binkert
cpu/simple_cpu/simple_cpu.cc: Allow requests to be uncacheable --HG-- extra : convert_revision : 7ab1442f2eec3763d5bc6a6f37b11f663851b12c
2004-02-17Add COW support to the IIC.Erik Hallnor
cpu/memtest/memtest.cc: Move the trace Addr to the end of the printouts --HG-- extra : convert_revision : 875f0a3f65e07f531a23fea6be07fbf3239ec2c4
2004-02-16MergeAndrew Schultz
arch/alpha/alpha_memory.cc: SCCS merged --HG-- extra : convert_revision : 0348e29c833684fd593a6c02913319f45f24e76e
2004-02-16changed interrupt index to be 64 bits long and fixed a bad includeAli Saidi
in adaptec_ctrl.hh cpu/base_cpu.cc: changed index to 64bits cpu/base_cpu.hh: changed index to 64 bits --HG-- extra : convert_revision : e70d5f09f6066b90fca82cae22bb7d7eb705d65e
2004-02-14Add full copy support.Erik Hallnor
cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: Add 2 new parameters to control the percentage of unaligned copy sources and destinations. --HG-- extra : convert_revision : 2646ee2f195e9f3e76bc257b8716163ef63a9f40
2004-02-13Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5Andrew Schultz
into zizzer.eecs.umich.edu:/z/alschult/linux --HG-- extra : convert_revision : 2ea2bbd41f7e0c257b374d9cd0e37abaf6a7c170
2004-02-10Add support for multiple outstanding aligned copiesErik Hallnor
cpu/memtest/memtest.cc: Add traceBlockAddr to trace outputs. --HG-- extra : convert_revision : e4ebaf9647fb393448367f4f4af3bae566f51c24
2004-02-09Merge linux tree with headAndrew Schultz
arch/alpha/alpha_memory.cc: dev/alpha_console.cc: dev/alpha_console.hh: Merge --HG-- extra : convert_revision : 3233648f204338ab3f102ff117754dce955dcc37
2004-02-09Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5Erik Hallnor
--HG-- extra : convert_revision : 0c018b88d6ca80b1690ec99d795014848e375e44
2004-02-09Add LRU aligned copies to the hierarchy, with only one outstanding copy. ↵Erik Hallnor
Aligned copies now fully work in LRU (just need to write the IIC doCopy call). At the moment they are slow since a stalled copy stalls the entire cache. cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: Add aligned copy tests, percent of copies is specified by percent_copies --HG-- extra : convert_revision : eaf1900fcb8832db98249e94e3472ebfb049eb48
2004-02-09Results of automatic (yet incomplete) merge.Steve Reinhardt
--HG-- extra : convert_revision : 3ad9a929051bfe111a1e10618c8595acbbade542
2004-02-05Merge zizzer.eecs.umich.edu:/bk/m5Nathan Binkert
into ziff.eecs.umich.edu:/z/binkertn/research/m5/kernel --HG-- extra : convert_revision : 9ee9b8550b5761fa400df83caf268bd1c8ddc7ed
2004-02-04Add support for "serializing" instructions that flushSteve Reinhardt
execution pipeline (Alpha trapb & excb). Add support for write memory barriers (mostly impacts store buffer). Add StaticInst flag to indicate memory barriers, though this is not modeled in the pipeline yet. arch/alpha/isa_desc: Implement trapb, excb, mb, and wmb as insts with no execution effect (empty execute() function) but with flags that indicate their side effects. Also make sure every instruction that needs to go to the execute stage has a real opClass value, since we are now using No_OpClass to signal insts that can get dropped at dispatch. StaticInst::branchTarget() is now a const method. cpu/static_inst.hh: Add flags to indicate serializing insts (trapb, excb) and memory and write barriers. Also declare some StaticInst methods as const methods. dev/etherlink.hh: sim/eventq.hh: sim/serialize.cc: sim/serialize.hh: sim/sim_object.hh: Make name() return value const. --HG-- extra : convert_revision : 39520e71469fa20e0a7446b2e06b494eec17a02c
2004-02-04More reformatting of reference parameter declarations.Steve Reinhardt
The last change only caught the ones with types that started with capitals. This pass catches the rest (mostly STL and uint*_t types). base/cprintf_formats.hh: cpu/simple_cpu/simple_cpu.cc: sim/serialize.cc: sim/serialize.hh: Change "foo_t& foo" to "foo_t &foo". --HG-- extra : convert_revision : fc7f7425db2aef33e490f952b5ce74c8c36d0d41
2004-02-03mergeNathan Binkert
--HG-- extra : convert_revision : 47425264e672f727cbb13aa7b9bb2a67790b25e8
2004-02-03Fix bug: forgot branchTarget() method on indirect branches.Steve Reinhardt
arch/alpha/isa_desc: Add missing branchTarget() method for indirect branches. cpu/static_inst.hh: Add comment clarifying when branchTarget() can be used on indirect branches. --HG-- extra : convert_revision : 0dcfb36a9792a338cefceb3d1501825abace7ac5
2004-02-02Get rid of LVQ-port function unit... only used for redundantSteve Reinhardt
multithreading, which has been gone for a long time. --HG-- extra : convert_revision : 717d13455483c3adc7b7cbbcc5f7493d51867974
2004-02-02insn->instSteve Reinhardt
--HG-- extra : convert_revision : fcc556fb7e65855ec3c04ef272177c8e7a38fff9
2004-02-02Change "Foo& foo" declarations to "Foo &foo".Steve Reinhardt
This primarily to be internally consistent (sometimes we used one, sometimes the other, even within the same line of code!). I picked the latter to be symmetric with "Foo *foo". base/cprintf_formats.hh: base/range.hh: base/refcnt.hh: base/res_list.hh: base/statistics.hh: base/str.hh: cpu/exec_context.hh: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: sim/serialize.cc: sim/serialize.hh: sim/syscall_emul.hh: Change "Foo& foo" declarations to "Foo &foo". --HG-- extra : convert_revision : ca1b0e85a578b539214bda3b8d61ac23792f2e87
2004-02-02More conversions of ref-counted parameters to references:Steve Reinhardt
Statistics::NodePtr, StaticInstPtr, ethernet PacketPtr. base/statistics.hh: Change NodePtr parameters to Nodeptr &. cpu/exetrace.hh: Change StaticInstPtr parameters to StaticInstPtr &. dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/ethertap.cc: dev/ethertap.hh: change PacketPtr parameters to PacketPtr &. --HG-- extra : convert_revision : a778efdca33b0ec5beb76cf47db0e9e4728897ee
2004-02-02Change MemReqPtr parameters to references.Steve Reinhardt
This avoids incrementing and decrementing the MemReq reference counters on every call and return. arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: cpu/exec_context.hh: cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: dev/alpha_console.cc: dev/alpha_console.hh: Change MemReqPtr parameters to references. --HG-- extra : convert_revision : 3ba18bdd9f996563988402576bfdd3430e1ab1e5
2004-01-30MergeNathan Binkert
--HG-- extra : convert_revision : 8690e31b64235874d74ea4a1123a408610fb115b
2004-01-28our first interruptAli Saidi
cpu/exetrace.cc: added looking for symbols at PC+4 and PC+8 thanks to gcc skiping setting the gp where it can and jumping <func>+8 dev/console.cc: commented out weird interrupt per nate's suggestion dev/tsunami_cchip.cc: moved rtc flag to correct bit dev/tsunami_io.cc: time interrupt will be 1024Hz and at some point be configurable by linux dev/tsunami_io.hh: Timer interrupt will be 1024hz for now and in the future be configurable by linux --HG-- extra : convert_revision : 2fcc924c8848eb3c6166d9d517617ed193a2b89a
2004-01-25Change the way the hierarchy is separated. Now all virtual functions are in ↵Erik Hallnor
the interfaces. This allows new bus models to be used without major hassle. And I thought it was time to change it all again anyways. cpu/simple_cpu/simple_cpu.cc: Switch doEvents to doEvents() --HG-- extra : convert_revision : 14b9517017e76c7b941247004393bf260f397d9a
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 12:17:57 +0000