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2004-10-25Don't use magic numbers.Nathan Binkert
arch/alpha/isa_traits.hh: Move defines to non full system code section so they can be used elsewhere cpu/simple_cpu/simple_cpu.cc: Don't use magic numbers cpu/simple_cpu/simple_cpu.hh: simple format nit --HG-- extra : convert_revision : b8d492218340d41ab9420c6ad1e81a197db1c132
2004-10-17Bunch of little changes for tracking copies and getting OPT right.Erik Hallnor
cpu/simple_cpu/simple_cpu.cc: Send Copy cpu/trace/opt_cpu.cc: Calculate the block size correctly. Set lookupTable value directly, since the old way only worked for FA caches. cpu/trace/trace_cpu.cc: Don't start events if the hierarchy is in non-event mode. --HG-- extra : convert_revision : daf2db5ed7428c2fb08652cf76f6fe99d8357db5
2004-10-01Make printouts look more like stats.Erik Hallnor
cpu/trace/opt_cpu.cc: Change printout to look more like real stats, should really just make these stats someday. --HG-- extra : convert_revision : cd5db4657a53abeda0417ca6ba4407d366408358
2004-09-30Updates to make traces work correctly in all circumstances. Add opt set ↵Erik Hallnor
associative simulation. cpu/trace/opt_cpu.cc: cpu/trace/opt_cpu.hh: Add the ability to simulate less than fully-associative opt caches. cpu/trace/reader/itx_reader.cc: Add writeback to the command list. --HG-- extra : convert_revision : a9c9c4be3358f4083d7e85772620441a3ad809db
2004-09-28Add opt cpu and fix page copy warningsErik Hallnor
SConscript: Add opt_cpu cpu/simple_cpu/simple_cpu.cc: Fix page spanning copy warning. cpu/trace/reader/itx_reader.cc: Fix reader to return correct address. --HG-- extra : convert_revision : f03e244971af4197743c7c717d64f21db0ae42d3
2004-09-22Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-smpAli Saidi
--HG-- extra : convert_revision : 19dc01e1c0d2c0ba6b4d804b902429fb0a6a5552
2004-09-20Update copies to work around alignment faults.Erik Hallnor
arch/alpha/isa_desc: whitespace fix. cpu/simple_cpu/simple_cpu.cc: Add support to make sure we don't get alignment faults in copies. Warn if we go over an 8k page boundary. --HG-- extra : convert_revision : 98b38da86a66215d80ea9eb6e6f1f68ee573cb57
2004-09-16pc event now clears lower 2 bitsAli Saidi
always build with dynamic libraries for mysqlclient SConscript: always use dynamic library now cpu/pc_event.hh: cleared lower 2 bits, since everything must be 4byte aligned --HG-- extra : convert_revision : 332ecd25a598e6a46a79bd653449aa7eb22a580a
2004-09-16switch contexts on palcode rather than kernel codeAli Saidi
cpu/pc_event.cc: mask off lower three bits so we can have an event in palcode --HG-- extra : convert_revision : 49fcdc5c359ca2bd9149f092f80f77abcd7b20ee
2004-09-03added system option to bin interrupt code seperately.Ali Saidi
arch/alpha/ev5.cc: set the mode explictly rather than having a bool user/notuser cpu/simple_cpu/simple_cpu.hh: there is no class Kernel kern/kernel_stats.cc: use cpu_mode_num kern/kernel_stats.hh: add interrupt mode and use cpu_mode_num rather than constant kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/system_events.cc: kern/system_events.hh: add events to change the mode to/from interrupt sim/system.cc: sim/system.hh: add a pal symbol table --HG-- extra : convert_revision : 9d30e826b72122062a5ea12d094f94760e75c66a
2004-09-02Update tracing functionality and add an ITX trace writer.Erik Hallnor
SConscript: Add build support for ITX trace writer cpu/trace/reader/itx_reader.cc: Handle full 36 bit physical addressses. cpu/trace/reader/itx_reader.hh: Need a string header file here cpu/trace/trace_cpu.cc: cpu/trace/trace_cpu.hh: Modify trace CPU to take a single trace and drive an instruction and data interfaces. --HG-- extra : convert_revision : 4c81f2f9d9341df41f0ae45e4bda49800a43977c
2004-08-20- Clean up and factor out all of the binning code into aNathan Binkert
single place so it's easier to work with. - Add support for binning kernel/user/idle time separately from lisa's binning stuff, but make the two compatible. - KernelStats used to directly implement the pImpl idiom, but it makes more sense to just remove the level of indirection and make the exec context have a pointer to the stats. - Factor common code out of LinuxSystem and Tru64System and put it into the System base class. While doing that, make all constructors take a pointer to a parameter struct instead of naming the parameters individually to make it much easier to add parameters to these classes. SConscript: Move the function tracking and binning stuff around. arch/alpha/ev5.cc: kernelStats is now a pointer arch/alpha/pseudo_inst.cc: kernelStats is now a pointer the parameters to the system have been moved into their own struct base/trace.hh: provide a little functor class for wrapping a string that can allow you to define name() in any scope very simply for use with DPRINTF cpu/base_cpu.cc: New order of arguments for consistency. cpu/exec_context.cc: kernelStats no longer has the level of indirection in it, execContext has the indirection now. so, kernelStats is a pointer. We also need a pointer to the kernelBinning stuff from the system and we need to figure out if we want to do binning or not. Move a whole bunch of code into kern_binning.cc so it's all in the same place. cpu/exec_context.hh: We want pointers to the kernel binning/stats stuff and we'll have the exec_context and system have the level of indirection instead of having the extra layer in the kernel stats class. cpu/simple_cpu/simple_cpu.cc: call through the exec context to do the special binning stuff. kern/kernel_stats.cc: kern/kernel_stats.hh: Re-organize the stats stuff and remove the level of indirection (that was there to simplify building) and move the binning stuff into its own class/file. kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: sim/system.cc: sim/system.hh: move lots of common system code into the base system class so that it can be shared between linux, tru64, and whatever else we decide to support in the future. Make the constructor take a pointer to a parameter struct so that it is easier to pass parameters to the parent. kern/system_events.cc: move the majority of the binning code into the Kernel::Binning class in the kern_binning file kern/system_events.hh: FnEvents only need to know the bin create the Idle start event to find the PCBB of the idle process when it starts. kern/tru64/tru64_events.cc: memCtrl -> memctrl sim/process.cc: sim/process.hh: re-order args for consistency --HG-- extra : convert_revision : 86cb39738c41fcd680f2aad125c9dde000227b2b
2004-07-28updated readme to reflect linux/scons changesAli Saidi
Put correct date in copyright headers based on bk changesets LICENSE: Updated copyright on license file README: Updaded readme to reflect shift to scons and linux support cpu/trace/reader/ibm_reader.cc: cpu/trace/reader/ibm_reader.hh: cpu/trace/reader/itx_reader.cc: cpu/trace/reader/itx_reader.hh: cpu/trace/reader/m5_reader.cc: cpu/trace/reader/m5_reader.hh: cpu/trace/reader/mem_trace_reader.cc: cpu/trace/reader/mem_trace_reader.hh: cpu/trace/trace_cpu.cc: cpu/trace/trace_cpu.hh: updated copyright (only changeset in 2004) kern/kernel_stats.cc: kern/kernel_stats.hh: updated copyright --HG-- extra : convert_revision : 726aed4b38ff4d230c63a570df83c63075b3c76f
2004-07-14Add a clock multiplier for simple CPU so that it is possibleNathan Binkert
to do multiple instructions per cycle. --HG-- extra : convert_revision : 5588ae38071f170792aad93899fef6842b7d818d
2004-07-06Remove duplicate statErik Hallnor
cpu/trace/reader/m5_reader.cc: Wrap assert variable in NDEBUG --HG-- extra : convert_revision : 8c79dc30eff2f2fa0110a04c30df17ec4417c28c
2004-06-30Merge zizzer:/bk/m5 into zizzer.eecs.umich.edu:/z/alschult/m5Andrew Schultz
--HG-- extra : convert_revision : 0bd6506e79600775dd0f72996120321f249b3411
2004-06-30Change assert to check on virtual addresses because the physicalAndrew Schultz
address can be zero for a copy --HG-- extra : convert_revision : c6089969396aee2d67fa695a31cb7c5aea794338
2004-06-28fix up the recordEvent stuff to support ignoring eventsNathan Binkert
arch/alpha/ev5.cc: cpu/simple_cpu/simple_cpu.cc: update for new event interface base/stats/events.cc: implement the ignore event function which matches sim objects from which to ignore events. Make insert event like insert data and make it able to insert many events in a single transaction with the database. base/stats/events.hh: Make it possible to ignore events sim/sim_object.cc: make recordEvent a member function of SimObject to implement the ignore function easily sim/sim_object.hh: implement the ignore event stuff in the sim object. This is a bit of a hack, but an easy place to put it. --HG-- extra : convert_revision : ba3f25a14ad03662c53fb35514860d69be8cd4f0
2004-06-23Merge zizzer:/bk/linux into zeep.eecs.umich.edu:/z/saidi/work/m5-endianAli Saidi
--HG-- extra : convert_revision : d4938c6011173d3017f47fd592c4b5e4c8d543a3
2004-06-22pull from head before pushing linux treeAli Saidi
--HG-- extra : convert_revision : 345f91c5c16c69db22035dc716e82fd77041380f
2004-06-21Merge saidi@zizzer.eecs.umich.edu:/bk/linuxAli Saidi
into ali-saidis-computer.local:/research/linux --HG-- extra : convert_revision : 446dc5fad11a6b29954dc5b1e974430853aa2969
2004-06-21start towards getting m5 endian compliantAli Saidi
base/inifile.cc: Added mac os support and fixed a bug, on error we need to exit the child process not return base/intmath.hh: gcc on macos wanted a seperate function for the size_t type base/loader/elf_object.cc: I'm not sure why this works under linux because it seems to return the wrong value. base/stats/text.cc: added define/include for mac os x cpu/exec_context.hh: cpu/simple_cpu/simple_cpu.cc: added endian conversion code dev/alpha_console.cc: rather than accessing a charecter array of varying size depending on the access, lets actually do this properly. dev/alpha_console.hh: get rid of now nolonger used consoleData dev/disk_image.cc: We have to byte swap the data is some cases, added function to do that dev/ethertap.cc: added preproc directive for mac os --HG-- extra : convert_revision : 2b5685765cfa2844926d7397f363d2788e3d640a
2004-06-17Serialized cpu interruptsAli Saidi
cpu/simple_cpu/simple_cpu.cc: called basecpu serialization --HG-- extra : convert_revision : 1a639b5e3c08e47a5d581c18b2b53fe87bd05b73
2004-06-15Merge isabel.reinhardt.house:/z/stever/bk/m5-headSteve Reinhardt
into isabel.reinhardt.house:/z/stever/bk/m5 --HG-- extra : convert_revision : 1af377ff2dbe27f357410ab91a50b06c61f12e83
2004-06-15Get software prefetching to work in full-system mode.Steve Reinhardt
Mostly a matter of keeping prefetches to invalid addrs from messing up VM IPRs. Also discovered that wh64s were not being treated as prefetches, when they really should be (for the most part, anyway). arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: - Get rid of intrlock flag for locking VM fault regs (a la EV5); instead, just don't update regs on VPTE loads (a la EV6). - Add NO_FAULT MemReq flag to indicate references that should not cause page faults (i.e., prefetches). arch/alpha/ev5.cc: - Get rid of intrlock flag for locking VM fault regs (a la EV5); instead, just don't update regs on VPTE loads (a la EV6). - Add Fault trace flag. arch/alpha/isa_desc: - Add NO_FAULT MemReq flag to indicate references that should not cause page faults (i.e., prefetches). - Mark wh64 as a "data prefetch" instruction so it gets controlled properly by the FullCPU data prefetch control switch. - Align wh64 EA in decoder so issue stage doesn't need to worry about it. arch/alpha/isa_traits.hh: - Get rid of intrlock flag for locking VM fault regs (a la EV5); instead, just don't update regs on VPTE loads (a la EV6). base/traceflags.py: - Add Fault trace flag. cpu/simple_cpu/simple_cpu.hh: - Pass MemReq flags to writeHint() operation. cpu/static_inst.hh: Update comment re: prefetches. --HG-- extra : convert_revision : 62e466b0f4c0ff9961796270fa2e371ec24bcbb6
2004-06-13Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Erik Hallnor
into zizzer.eecs.umich.edu:/z/ehallnor/work/m5 --HG-- extra : convert_revision : 88c83150b7fd9260e0441334f2503b1e029d8c09
2004-06-13Add some rewritten trace readers.Erik Hallnor
--HG-- extra : convert_revision : 4a085c5d8526d1bf3f7155cda40002281c0c3d1b
2004-06-10lift common code *kernel_stats.* into the kern directory.Lisa Hsu
cpu/exec_context.hh: lift kernel_stats out in the linux tree. --HG-- extra : convert_revision : 866c7f82d8b995b4dce295de1ab0980527d13f01
2004-06-10lif kernelt stats out of tru64 directoryLisa Hsu
cpu/exec_context.hh: change this to reflect the lifted kernel stats file. --HG-- extra : convert_revision : 0dda3babdf51ee7a57430af69c7e20322b4eb622
2004-06-08Tracing now works for upto 4 threads. Easy change to get it to work for ↵Erik Hallnor
more, but I don't have any test handy to test it. cpu/trace/reader/m5_reader.cc: Add thread num. cpu/trace/trace_cpu.cc: Increase thread count to 4, might want to make this a parameter (but it only really costs us storage). --HG-- extra : convert_revision : 97cd7843668a3ef85aad06e3180dc04d2ca30ac1
2004-06-08Add the capability to read and write memory trace files. Currently is cycle ↵Erik Hallnor
accurate for a single thread FullCPU. --HG-- extra : convert_revision : f8fe545313eb307cc6f5ff2c23894cc9870b1d5b
2004-06-08Updated Copyright with information in bitkeeper changelogsAli Saidi
arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_linux_process.hh: arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/alpha_tru64_process.cc: arch/alpha/alpha_tru64_process.hh: arch/alpha/aout_machdep.h: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/faults.cc: arch/alpha/faults.hh: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/osfpal.hh: arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: arch/alpha/vptr.hh: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/bitfield.hh: base/callback.hh: base/circlebuf.cc: base/circlebuf.hh: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/compression/null_compression.hh: base/cprintf.cc: base/cprintf.hh: base/cprintf_formats.hh: base/date.cc: base/dbl_list.hh: base/endian.hh: base/fast_alloc.cc: base/fast_alloc.hh: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/intmath.hh: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/misc.cc: base/misc.hh: base/mod_num.hh: base/mysql.cc: base/mysql.hh: base/pollevent.cc: base/pollevent.hh: base/predictor.hh: base/random.cc: base/random.hh: base/range.cc: base/range.hh: base/refcnt.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/socket.hh: base/statistics.cc: base/statistics.hh: base/stats/events.cc: base/stats/events.hh: base/stats/flags.hh: base/stats/mysql.cc: base/stats/mysql.hh: base/stats/mysql_run.hh: base/stats/output.hh: base/stats/statdb.cc: base/stats/statdb.hh: base/stats/text.cc: base/stats/text.hh: base/stats/types.hh: base/stats/visit.cc: base/stats/visit.hh: base/str.cc: base/str.hh: base/time.cc: base/time.hh: base/trace.cc: base/trace.hh: base/userinfo.cc: base/userinfo.hh: cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/full_cpu/op_class.hh: cpu/full_cpu/smt.hh: cpu/inst_seq.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: cpu/pc_event.cc: cpu/pc_event.hh: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/static_inst.cc: cpu/static_inst.hh: dev/alpha_console.cc: dev/alpha_console.hh: dev/baddev.cc: dev/baddev.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.cc: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/io_device.cc: dev/io_device.hh: dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/pcireg.h: dev/platform.cc: dev/platform.hh: dev/simple_disk.cc: dev/simple_disk.hh: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/tsunami_uart.hh: dev/tsunamireg.h: docs/stl.hh: kern/linux/linux.hh: kern/linux/linux_syscalls.cc: kern/linux/linux_syscalls.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/system_events.cc: kern/system_events.hh: kern/tru64/dump_mbuf.cc: kern/tru64/dump_mbuf.hh: kern/tru64/mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: kern/tru64/tru64.hh: kern/tru64/tru64_events.cc: kern/tru64/tru64_events.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: sim/async.hh: sim/builder.cc: sim/builder.hh: sim/debug.cc: sim/debug.hh: sim/eventq.cc: sim/eventq.hh: sim/host.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/process.cc: sim/process.hh: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: sim/sim_object.cc: sim/sim_object.hh: sim/stat_control.cc: sim/stat_control.hh: sim/stats.hh: sim/syscall_emul.cc: sim/syscall_emul.hh: sim/system.cc: sim/system.hh: sim/universe.cc: test/bitvectest.cc: test/circletest.cc: test/cprintftest.cc: test/initest.cc: test/lru_test.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/sized_test.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/m5/m5.c: util/m5/m5op.h: util/tap/tap.cc: Updated Copyright dev/console.cc: dev/console.hh: This code isn't ours, and shouldn't have our copyright --HG-- extra : convert_revision : 598f2e5eab5d5d3de2c1e862b389086e3212f7c4
2004-06-01Merge saidi@zizzer:/z/m5/Bitkeeper/m5/Ali Saidi
into zeep.eecs.umich.edu:/z/saidi/work/m5 --HG-- extra : convert_revision : 89e0bdd427b23a8f52b8ba53b18451df7be22f14
2004-06-01Added ability to specify system type/revision in config file. ThisAli Saidi
way a Tru64 system can be either Tlaser (by default) or Tsunami. Added debugSymbolTable to Tru64 for symbol printing in InstExec Trace cpu/exetrace.cc: Fixed bug if debugSymbolTable doesn't exist, we shouldn't try to look something up in it. kern/tru64/tru64_system.hh: Added ability to specify system type/revision in config file. This way a Tru64 system can be either Tlaser (by default) or Tsunami. --HG-- extra : convert_revision : c69a7411f0aa118ca5a766e43b7ceb7a5bb04cdf
2004-05-31Renamed OpClass enum members: they all end in 'Op' now.Steve Reinhardt
Got rid of two inconsistent sets of strings that corresponded to this enum, and replaced with a single set that clearly matches the enum names. arch/alpha/isa_desc: arch/isa_parser.py: cpu/full_cpu/op_class.hh: Renamed OpClass enum members. --HG-- extra : convert_revision : bf596f7568a20b2e77c07ac349f253135141aef4
2004-05-31Merged head into linux treeAli Saidi
base/stats/mysql.hh: Rename of Statsistics namespace to stats... merge from head --HG-- extra : convert_revision : a5a7f6268b35e75fba1b1800a74fcd6dbd09d974
2004-05-28Merged in new FastCPU stuff with existing code.Kevin Lim
arch/alpha/ev5.cc: Added templatized processInterrupts() function that can be used by all of the CPU models. arch/alpha/isa_desc: Merged in changes to remove CPU dependence. arch/isa_parser.py: Merged in changes. cpu/static_inst.hh: Includes FastCPU execute methods. --HG-- extra : convert_revision : fcaa1dca35a9b316c73982bec8680df564f50bd8
2004-05-27FastCPU model added. It's very similar to the SimpleCPU, just without a lot ↵Kevin Lim
of the stats tracking. Also various changes to make the CPU model less ISA dependent, which includes moving the code that checks for interrupts up to the ISA level, moving code that zeroes the zero registers up to the ISA level, and removing opcode and ra from the regfile. arch/alpha/alpha_memory.cc: The regfile has been changed so it no longer has the opcode and ra. Instead the xc holds the actual instruction, and from there the opcode and ra can be obtained with OPCODE() and RA(). arch/alpha/ev5.cc: Moved code that once existed within simpleCPU to ev5, and templatized it. This way the CPU models can call processInterrupts and the ISA specific interrupt handling is left to the ISA's code. Also moved ISA specific zero registers from simpleCPU to here. arch/alpha/ev5.hh: Added macros for obtaining the opcode and ra from the instruction itself, as there is no longer opcode or ra in the regfile. arch/alpha/isa_desc: Added in declarations for the FastCPU model. arch/alpha/isa_traits.hh: Removed opcode and ra from the regfile. The xc now holds the actual instruction, and the opcode and ra can be obtained through it. Also added the declaration for the templated zeroRegisters() function, which will set the zero registers to 0. arch/isa_parser.py: Added in FastCPUExecContext so it will generate code for the FastCPU model as well. cpu/exec_context.cc: Added in a more generic trap function so "ev5_trap" doesn't need to be called. It currently still calls the old method, with plans for making this ISA dependent in the future. cpu/exec_context.hh: Exec context now has the instruction within it. Also added methods for exec context to read an instruction from memory, return the current instruction, and set the instruction if needed. Also has declaration for more generic trap() function. cpu/simple_cpu/simple_cpu.cc: Removed references to opcode and ra, and instead sets the xc's instruction with the fetched instruction. cpu/static_inst.hh: Added declaration for execute() using FastCPUExecContext. --HG-- extra : convert_revision : 0441ea3700ac50b733e485395d4dd4ac83666f92
2004-05-21add a few statistics eventsNathan Binkert
arch/alpha/ev5.cc: Add an event for faults cpu/simple_cpu/simple_cpu.cc: add events for uncached reads/writes --HG-- extra : convert_revision : 747bdf12761e2de6ebbf54fecc9e0b71915b3a02
2004-05-21rename namespace Statistics to StatsNathan Binkert
--HG-- extra : convert_revision : 28f1703f8d7d8cf33fb952ae450f66bdba860fb7
2004-05-21Change the namespace Statistics to StatsNathan Binkert
--HG-- extra : convert_revision : 3084b292bbe2e8a392af8e99a31763ca0b0a9467
2004-05-18Add a level of indirection to the register accessors used inSteve Reinhardt
instruction execute methods. Register i now means the instruction's i'th src (or dest) operand, not architectural register i. Current models that use the architectural reg index can look that up easily in the instruction object. Future models that do register renaming should find this much simpler to deal with. arch/isa_parser.py: Generate register accessors with an extra level of indirection. cpu/simple_cpu/simple_cpu.hh: Modify register accessors to use an extra level of indirection. --HG-- extra : convert_revision : f4c7d6bfa92fb2ea6251f31ee368809c3643f08f
2004-05-18Replace explicit xc->misspeculating() tests in execute() methodsSteve Reinhardt
with an IsNonSpeculative flag. No effect on results of non-full-system or SimpleCPU. Very small impact on full-system FullCPU runs since old wrong-path call_pal insts used to change the PC, where now they're treated as no-ops. arch/alpha/isa_desc: Get rid of xc->misspeculating() checks, use IsNonSpeculative flag instead. cpu/static_inst.hh: Add IsNonSpeculative flag and isNonSpeculative() method to test it. --HG-- extra : convert_revision : 7ec536bfc28b905c429c09eb920ed73ef2beeeba
2004-05-18merge m5 with linux for the event and binning liftingLisa Hsu
--HG-- extra : convert_revision : 09d3678746c2e9a93a9982dc75d5e1ac309cb2fa
2004-05-17Significant changes to ISA description to completely factorSteve Reinhardt
out CPU model. ISA description now generates multiple output source files to (in theory) reduce compilation time. arch/alpha/isa_desc: Update for parser changes. Move most constructors out of class declarations (which are now in decoder.hh) and into decoder.cc. Move all execute() methods into exec output. arch/isa_parser.py: Significant changes to make ISA description completely independent of CPU model, and isolate model-dependent parts of parser into one little class (CpuModel). Also split up code output into multiple files (a header, a main source file, and per-cpu execute() method files). Noticeable changes to language as a result. See updated Doxygen documentation. cpu/simple_cpu/simple_cpu.hh: SimpleCPUExecContext typedef no longer needed. Add forward declaration of Process. cpu/static_inst.hh: SimpleCPUExecContext and FullCPUExecContext typedefs no longer needed. Make eaCompInst() and memAccInst() return const refs. --HG-- extra : convert_revision : 71471f267804fafd0a881bac7445677e76334daf
2004-05-13remove the annotation junkNathan Binkert
arch/alpha/isa_desc: remove the annotation junk Move some code to AlphaPseudo where it belongs arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: remove the annotation junk add pseudo instruction code that was previously misplaced --HG-- extra : convert_revision : 97db8402aa34e0bdf044b138c52331fc9e714986
2004-05-12Make a new stat type of Value which is a scalar stat thatNathan Binkert
proxies for a real C/C++ scalar value or scalar functor. This replaces the scalar() and functor() terms that were previously used in formulas. This helps when dumping statistics because the formulas are not supposed to change. cpu/base_cpu.cc: Add a number of cycles stat to the cpu object that tracks the number of cycles that the cpu has executed. This starts to pave the way for cpu cycles being different from event ticks. cpu/base_cpu.hh: provide a functor for calculating all simulated instructions of all CPUs and a virtual function for determining that number. To deal with the change from functor() to Value::functor() cpu/simple_cpu/simple_cpu.cc: simTicks -> numCycles numInsts is now a real Scalar stat, not a Formula cpu/simple_cpu/simple_cpu.hh: numInsts is now a real Scalar stat, not a Formula count all instructions sim/stat_control.cc: simInsts, simTicks, hostMemory, and hostSeconds are no longer Statistics::Formula but rather Statistics::Value add new stat for tick frequency sim/stats.hh: don't need everything to be extern. test/Makefile: Make stuff work a tad bit better test/stattest.cc: test out Statistics::Value --HG-- extra : convert_revision : c812e8baa2b17c08abf3a68ed1e1125dc6f2cfb4
2004-05-11first pass at merging m5 with linuxLisa Hsu
--HG-- extra : convert_revision : dfe23349b80ae3b34d3cb95c5734e01ef62f700e
2004-05-10Do a better job of factoring out CPU model in ISA description.Steve Reinhardt
(Still not perfect though.) arch/alpha/isa_desc: Do a better job of factoring out CPU model. (Still not perfect though.) Pull execute() methods out of class declarations into separate section of file, allowing (1) easier replication for different CPU models and (2) a path to putting them all in a separate file. Force all instruction execution context into a single model-dependent class (SimpleCPU itself for SimpleCPU, DynInst for FullCPU). arch/isa_parser.py: Do a better job of factoring out CPU model. (Still not perfect though.) Pull execute() methods out of class declarations into separate section of file, allowing (1) easier replication for different CPU models and (2) a path to putting them all in a separate file. Also restructure top level to allow parser to run under interactive interpreter session for easier debugging. cpu/exec_context.hh: Add a few new methods to clean up isa_desc. cpu/simple_cpu/simple_cpu.cc: cpu/static_inst.hh: StaticInst::execute no longer takes a CPU and an ExecContext, just a unified FooCPUExecContext. cpu/simple_cpu/simple_cpu.hh: Add methods to redirect calls to ExecContext so SimpleCPU can act as sole instruction execution context for itself. Typedef SimpleCPU to SimpleCPUExecContext. --HG-- extra : convert_revision : ecc445503bc585585da5663fe61796580e744da6
2004-05-06Whole mess'o'changes.. see individual filesAndrew Schultz
arch/alpha/vtophys.cc: Removed buggy code that tries to fix PAL addresses (may cause problems while trying to debug in PAL code, but that should do this fix outside of vtophys) base/loader/symtab.cc: base/loader/symtab.hh: cpu/exetrace.cc: Changed InstExec traces to always print a symbol name dev/ide_ctrl.cc: dev/ide_disk.cc: Tabs dev/ide_disk.hh: Change buffer size dev/tsunami_pchip.cc: Fix translatePciToDma to support scatter gather mapping kern/linux/linux_system.cc: Force simulator to wait until remote debugger attaches (should be removed or turned on/off with a flag) --HG-- extra : convert_revision : 1d08aebe3f448c87a963dd613de3e2e0cff0d48d