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2005-08-15Changes for getting FreeBSD to run.Miguel Serrano
SConscript: Added more files to compile: dev/pcifake.cc, dev/isa_fake.cc, kern/freebsd/freebsd_system.cc, kern/freebsd/freebsd_events.cc. arch/alpha/isa_traits.hh: Added constant for argument register 2 as it is needed by FreebsdSystem::doCalibrateClocks(). cpu/exec_context.hh: cpu/o3/alpha_cpu.hh: Replaced htoa()s with gtoh() and htog(). cpu/o3/fetch_impl.hh: cpu/simple/cpu.cc: Replaced htoa() with gtoh(). dev/disk_image.cc: Replaced htoa()s with letoh()s. dev/ide_ctrl.cc: Got rid of magic numbers. Added IdeChannel and IdeRegType type names where necessary. dev/ide_ctrl.hh: Got rid of unnecessary macros. Changed RegType_t to IdeRegType. Changed bmi_regs to allow accessing registers by name instead of just by array index. Added IdeChannel enum type to use in place of bool variables which were used to specify IDE channel. dev/ide_disk.cc: Rewrote IdeDisk::read and IdeDisk::write functions to specify registers by name instead of indexing through an array. dev/ide_disk.hh: Updated command register struct. dev/ns_gige.cc: dev/ns_gige.hh: Made ReadConfig and WriteConfig begin with a lower-case letter. writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pciconfigall.cc: writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pcidev.cc: Cleaned up readConfig() and writeConfig() functions. dev/pcidev.hh: Added macros to make code that works with the BARs (base adress registers) more readable. writeConfig() now takes a pointer to data. dev/pcireg.h: Changed PCIConfig struct to make accessing elements more straight forward. Removed type 1 (for PCI-to-PCI bridges) PCI configuration space struct since it is not used. dev/rtcreg.h: Added macros for bit fields in RTC status registers A & B. dev/sinic.cc: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. The accessing of elements of PCIConfig structure is updated. dev/sinic.hh: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. dev/tsunami_io.cc: Added implementation of new RTC and PIT classes. dev/tsunami_io.hh: Added classes for RTC and PIT modules. dev/tsunamireg.h: Added macros for DMA ports used by Tsunami-Tru64. dev/uart8250.cc: Got rid of a magic number. Transmit (Tx) interrupts should clear upon a read of the Interrupt ID register. dev/uart8250.hh: Added comments and macros dealing with the UART Interrupt ID register. kern/linux/linux_system.cc: Replaced htoa() with htog(). python/m5/objects/Pci.py: PciFake is a python class for Pci Devices that do nothing. python/m5/objects/Tsunami.py: TsunamiFake was renamed as IsaFake. sim/system.cc: Replaced htoa()s with htog()s. dev/isa_fake.cc: New BitKeeper file ``dev/isa_fake.cc'' TsunamiFake was renamed as IsaFake. dev/isa_fake.hh: New BitKeeper file ``dev/isa_fake.hh'' TsunmaiFake was renamed as IsaFake. dev/pitreg.h: New BitKeeper file ``dev/pitreg.h'' Useful macros for working with PIT (Periodic Interval Timer) registers. --HG-- extra : convert_revision : 33f3a8a1034af4f6c71b32dd743e371c8613e780
2005-06-05Many files:Steve Reinhardt
Update copyright dates and author list SConscript: arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_linux_process.hh: arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/alpha_tru64_process.cc: arch/alpha/alpha_tru64_process.hh: arch/alpha/aout_machdep.h: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/faults.cc: arch/alpha/faults.hh: arch/alpha/isa_desc: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/osfpal.hh: arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: arch/alpha/vptr.hh: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/bitfield.hh: base/callback.hh: base/circlebuf.cc: base/circlebuf.hh: base/cprintf.cc: base/cprintf.hh: base/cprintf_formats.hh: base/crc.hh: base/date.cc: base/dbl_list.hh: base/endian.hh: base/fast_alloc.cc: base/fast_alloc.hh: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/intmath.hh: base/match.cc: base/match.hh: base/misc.cc: base/misc.hh: base/mod_num.hh: base/mysql.cc: base/mysql.hh: base/output.cc: base/output.hh: base/pollevent.cc: base/pollevent.hh: base/predictor.hh: base/random.cc: base/random.hh: base/range.cc: base/range.hh: base/refcnt.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/socket.hh: base/statistics.cc: base/statistics.hh: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/compression/null_compression.hh: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/stats/events.cc: base/stats/events.hh: base/stats/flags.hh: base/stats/mysql.cc: base/stats/mysql.hh: base/stats/mysql_run.hh: base/stats/output.hh: base/stats/statdb.cc: base/stats/statdb.hh: base/stats/text.cc: base/stats/text.hh: base/stats/types.hh: base/stats/visit.cc: base/stats/visit.hh: base/str.cc: base/str.hh: base/time.cc: base/time.hh: base/timebuf.hh: base/trace.cc: base/trace.hh: base/userinfo.cc: base/userinfo.hh: build/SConstruct: cpu/base.cc: cpu/base.hh: cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/inst_seq.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/pc_event.cc: cpu/pc_event.hh: cpu/smt.hh: cpu/static_inst.cc: cpu/static_inst.hh: cpu/memtest/memtest.hh: cpu/o3/sat_counter.cc: cpu/o3/sat_counter.hh: cpu/ozone/cpu.hh: cpu/simple/cpu.cc: cpu/simple/cpu.hh: cpu/trace/opt_cpu.cc: cpu/trace/opt_cpu.hh: cpu/trace/reader/ibm_reader.cc: cpu/trace/reader/ibm_reader.hh: cpu/trace/reader/itx_reader.cc: cpu/trace/reader/itx_reader.hh: cpu/trace/reader/m5_reader.cc: cpu/trace/reader/m5_reader.hh: cpu/trace/reader/mem_trace_reader.cc: cpu/trace/reader/mem_trace_reader.hh: cpu/trace/trace_cpu.cc: cpu/trace/trace_cpu.hh: dev/alpha_access.h: dev/alpha_console.cc: dev/alpha_console.hh: dev/baddev.cc: dev/baddev.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.cc: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/io_device.cc: dev/io_device.hh: dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/pcireg.h: dev/pktfifo.cc: dev/pktfifo.hh: dev/platform.cc: dev/platform.hh: dev/simconsole.cc: dev/simconsole.hh: dev/simple_disk.cc: dev/simple_disk.hh: dev/sinic.cc: dev/sinic.hh: dev/sinicreg.hh: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/tsunamireg.h: dev/uart.cc: dev/uart.hh: dev/uart8250.cc: dev/uart8250.hh: docs/stl.hh: encumbered/cpu/full/op_class.hh: kern/kernel_stats.cc: kern/kernel_stats.hh: kern/linux/linux.hh: kern/linux/linux_syscalls.cc: kern/linux/linux_syscalls.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/linux/linux_threadinfo.hh: kern/linux/printk.cc: kern/linux/printk.hh: kern/system_events.cc: kern/system_events.hh: kern/tru64/dump_mbuf.cc: kern/tru64/dump_mbuf.hh: kern/tru64/mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: kern/tru64/tru64.hh: kern/tru64/tru64_events.cc: kern/tru64/tru64_events.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: python/SConscript: python/m5/__init__.py: python/m5/config.py: python/m5/convert.py: python/m5/multidict.py: python/m5/smartdict.py: sim/async.hh: sim/builder.cc: sim/builder.hh: sim/debug.cc: sim/debug.hh: sim/eventq.cc: sim/eventq.hh: sim/host.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/process.cc: sim/process.hh: sim/root.cc: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: sim/sim_object.cc: sim/sim_object.hh: sim/startup.cc: sim/startup.hh: sim/stat_control.cc: sim/stat_control.hh: sim/stats.hh: sim/syscall_emul.cc: sim/syscall_emul.hh: sim/system.cc: sim/system.hh: test/bitvectest.cc: test/circletest.cc: test/cprintftest.cc: test/genini.py: test/initest.cc: test/lru_test.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/sized_test.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/ccdrv/devtime.c: util/m5/m5.c: util/oprofile-top.py: util/rundiff: util/m5/m5op.h: util/m5/m5op.s: util/stats/db.py: util/stats/dbinit.py: util/stats/display.py: util/stats/info.py: util/stats/print.py: util/stats/stats.py: util/tap/tap.cc: Update copyright dates and author list --HG-- extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2005-06-04Fix doxgyen commentsAli Saidi
Use openbsd ide/atapi header files dev/alpha_console.cc: dev/alpha_console.hh: dev/baddev.cc: dev/baddev.hh: dev/disk_image.cc: dev/disk_image.hh: dev/tsunami_cchip.hh: dev/tsunami_io.hh: dev/tsunami_pchip.hh: Fix Doxygen comments dev/ide_disk.cc: Use BSD atapi/ide header files dev/ide_disk.hh: use ide/atapi header files --HG-- extra : convert_revision : a15e40c7d7cc52af6867821e9574ba5c47021721
2005-04-11Make the notion of a global event tick independent of the actualNathan Binkert
CPU cycle ticks. This allows the user to have CPUs of different frequencies, and also allows frequencies and latencies that are not evenly divisible by the CPU frequency. For now, the CPU frequency is still set to the global frequency, but soon, we'll hopefully make the global frequency fixed at something like 1THz and set all other frequencies independently. arch/alpha/ev5.cc: The cycles counter is based on the current cpu cycle. cpu/base_cpu.cc: frequency isn't the cpu parameter anymore, cycleTime is. cpu/base_cpu.hh: frequency isn't the cpu parameter anymore, cycleTime is. create several public functions for getting the cpu frequency and the numbers of ticks for a given number of cycles, etc. cpu/memtest/memtest.cc: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/trace/trace_cpu.cc: Now that ticks aren't cpu cycles, fixup code to advance by the proper number of ticks. cpu/memtest/memtest.hh: cpu/trace/trace_cpu.hh: Provide a function to get the number of ticks for a given number of cycles. dev/alpha_console.cc: Update for changes in the way that frequencies and latencies are accessed. Move some stuff to init() dev/alpha_console.hh: Need a pointer to the system and the cpu to get the frequency so we can pass the info to the console code. dev/etherbus.cc: dev/etherbus.hh: dev/etherlink.cc: dev/etherlink.hh: dev/ethertap.cc: dev/ide_disk.hh: dev/ns_gige.cc: dev/ns_gige.hh: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. dev/ide_disk.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. Add some extra debugging printfs dev/platform.cc: dev/sinic.cc: dev/sinic.hh: outline the constructor and destructor dev/platform.hh: outline the constructor and destructor. don't keep track of the interrupt frequency. Only provide the accessor function. dev/tsunami.cc: dev/tsunami.hh: outline the constructor and destructor Don't set the interrupt frequency here. Get it from the actual device that does the interrupting. dev/tsunami_io.cc: dev/tsunami_io.hh: Make the interrupt interval a configuration parameter. (And convert the interval to the new latency/frequency stuff in the python) kern/linux/linux_system.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. kern/tru64/tru64_system.cc: For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. python/m5/config.py: Fix support for cycle_time relative latencies and frequencies. Add support for getting a NetworkBandwidth or a MemoryBandwidth. python/m5/objects/BaseCPU.mpy: All CPUs now have a cycle_time. The default is the global frequency, but it is now possible to set the global frequency to some large value (like 1THz) and set each CPU frequency independently. python/m5/objects/BaseCache.mpy: python/m5/objects/Ide.mpy: Make this a Latency parameter python/m5/objects/BaseSystem.mpy: We need to pass the boot CPU's frequency to the system python/m5/objects/Ethernet.mpy: Update parameter types to use latency and bandwidth types python/m5/objects/Platform.mpy: this frequency isn't needed. We get it from the clock interrupt. python/m5/objects/Tsunami.mpy: The clock generator should hold the frequency sim/eventq.hh: Need to remove this assertion because the writeback event queue is different from the CPU's event queue which can cause this assertion to fail. sim/process.cc: Fix comment. sim/system.hh: Struct member to hold the boot CPU's frequency. sim/universe.cc: remove unneeded variable. --HG-- extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2004-06-23Fix to properly shadow the DEV bit in the Drive/Head register so otherAndrew Schultz
disks are properly detected and handled --HG-- extra : convert_revision : ffc3046deb68458ee2ef6fa5263dc471488abc45
2004-06-04MergeAli Saidi
dev/tsunami_pchip.cc: SCCS merged --HG-- extra : convert_revision : 064e3bab82aacf813d1f049d72429fd990608044
2004-06-04Updated copyright on Tsunami and kern/linux files.Ali Saidi
dev/baddev.cc: dev/baddev.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/ns_gige.cc: dev/ns_gige.hh: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/pcireg.h: dev/platform.cc: dev/platform.hh: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: kern/linux/linux.hh: kern/linux/linux_syscalls.cc: kern/linux/linux_syscalls.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: Updated copyright dev/tsunamireg.h: Updated copyright and fixed a ULL --HG-- extra : convert_revision : 4800bd227c7064044ee98169d6a91f74c791956f
2004-06-03Fixes in translation in PCI to DMA address to fix boot problems withAndrew Schultz
Linux 2.6 with DMA support dev/ide_disk.cc: Add debug infomation for DMA transfers and fix handling of PRD pointer values dev/ide_disk.hh: Reduce buffer (MAX_DMA) size to 64K dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: Add handling of PCTL register and also fix the translate from PCI to DMA addresses which was incorrect --HG-- extra : convert_revision : 562f55fa1c7099ad0f5a23f59dec2c8ec7601d43
2004-06-01Fixes to the state machine to properly support software reset and to fixAndrew Schultz
PIO writes. This was mainly related to not shadowing the status register properly, and also not setting some of the status bits expected by the operating system for the PIO write protocol. --HG-- extra : convert_revision : fcdfd588be6e4f237aa6057889f0b3bdf4ea7631
2004-05-12Fixes to DMA writing (still unverified) and added serialize/unserializeAndrew Schultz
dev/ide_ctrl.cc: Added serialize/unserialize functions and move some inlined functions to regular functions dev/ide_ctrl.hh: Change inlined functions to regular functions dev/ide_disk.cc: Changes to dmaWrite and also add serialize/unserialize functions dev/ide_disk.hh: Support for serializing/unserializing --HG-- extra : convert_revision : 40e016dc7f6637b033fe33409338437c985a05f4
2004-05-11Changes to fix bad DMA handling by disk when using scatter gather pageAndrew Schultz
mappings (writes still unverified, and read could probably be looked over a bit more too) dev/ide_disk.cc: dev/ide_disk.hh: Major changes to fix bogus handling of dma transfers. The read seems to work pretty well, but the write is unverfied until we can get a disk image that actually tries to write. dev/tsunami_pchip.cc: Change mask to properly mask 13 bits not 12 --HG-- extra : convert_revision : 08fe9bc32970e449cd045de479553a96a4e389d6
2004-05-06Whole mess'o'changes.. see individual filesAndrew Schultz
arch/alpha/vtophys.cc: Removed buggy code that tries to fix PAL addresses (may cause problems while trying to debug in PAL code, but that should do this fix outside of vtophys) base/loader/symtab.cc: base/loader/symtab.hh: cpu/exetrace.cc: Changed InstExec traces to always print a symbol name dev/ide_ctrl.cc: dev/ide_disk.cc: Tabs dev/ide_disk.hh: Change buffer size dev/tsunami_pchip.cc: Fix translatePciToDma to support scatter gather mapping kern/linux/linux_system.cc: Force simulator to wait until remote debugger attaches (should be removed or turned on/off with a flag) --HG-- extra : convert_revision : 1d08aebe3f448c87a963dd613de3e2e0cff0d48d
2004-05-03Checkin of latest IDE and some separation between platforms (Tsunami andAndrew Schultz
Turbolaser) base/range.hh: Change semantics of range to be inclusive of the end value, may need to check other users of range to make sure they are semantically correct. This was needed for access of last byte in range of address on IDE and makes sense for case of range from 0 to all f dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: Whole mess of changes.. at current state simulator will boot and read partition table and then have a bunch of errors and panic dev/pciconfigall.cc: dev/pciconfigall.hh: dev/platform.hh: Changes to work with platform separation dev/tsunami.cc: dev/tsunami.hh: Change to work with platform separation --HG-- extra : convert_revision : e1de22b54df7fdcf391efc2a8555ada93f46beab
2004-03-23Add initial support for IDEAndrew Schultz
--HG-- extra : convert_revision : e07dc6c87b0b692d428b541d4032fcf82996ef15