gem5 - gem5

Age	Commit message (Expand)	Author
2006-04-06	fixes for newmem	Ali Saidi
2006-04-06	fixes for new memory system	Ali Saidi
2006-03-29	move stuff around so PageShift is defined before it is needed	Ali Saidi
2006-03-26	Add the bus and connector objects to scons	Ali Saidi
2006-03-25	Implement a very very simple bus	Ali Saidi
2006-03-21	Make PioPort/DmaPort,DmaDevice/PioDevice compile.	Ali Saidi
2006-02-21	Rename Port address range functions... like the block size	Steve Reinhardt
2006-01-31	changed sendresult -> bool,tick,void as appropriate	Ali Saidi
2005-06-05	Many files:	Steve Reinhardt
2005-06-04	shuffle files around for new directory structure	Nathan Binkert
2005-01-15	New and improved configuration mechanism. No more writing of	Nathan Binkert
2004-12-09	Change Bus template parameter to BusType (to avoid confusion with Bus class).	Steve Reinhardt
2004-07-12	make the cache access latency a parameter that is based on bus	Nathan Binkert
2004-06-08	Updated Copyright with information in bitkeeper changelogs	Ali Saidi
2004-02-20	make the dma interface useable.	Nathan Binkert
2004-02-11	Add support for all devices to get requests from a timing memory bus.	Nathan Binkert