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2005-11-20io_bus is split out into pio_bus and dma_bus so that any deviceNathan Binkert
can specify either independently. python/m5/objects/Device.py: io_bus is split out into pio_bus and dma_bus so that any device can specify either independently. dma_bus defaults to point to whatever pio_bus uses. --HG-- extra : convert_revision : d35d5374d0bf592f6b5df465c05203577b8b8763
2005-08-23Lots of fixes to serialization and naming of various deviceNathan Binkert
objects. The improper serialization of arrays was particularly bad. dev/alpha_console.cc: dev/isa_fake.cc: dev/ns_gige.cc: dev/pciconfigall.cc: dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_pchip.cc: the pio interface is a different simobject and should have a different name. dev/ethertap.cc: fix serialization. dev/ide_ctrl.cc: - the pio interface is a different simobject and should have a different name. - properly initialize variables - When serializing an array, the size is the number of elements, not the number of bytes! dev/pcidev.cc: When serializing an array, the size is the number of elements, not the number of bytes! dev/tsunami_io.hh: Don't make objects SimObjects if they're not exposed to python. Don't add serialization functions to events, it's generally not what you want. allow the real time clock and interval timer to serialize themselves, must pass a base name since it is not a SimObject and the values will be going into the section of the parent. --HG-- extra : convert_revision : 3fc5de9b858ed770c8f385cf38b53242cf859c33
2005-08-19A few minor fixes to get things to build on Cygwin.Steve Reinhardt
README: Clarify cygwin EIO error explanation. build/SConstruct: Cygwin header files cause uninitialized var warnings. dev/ide_ctrl.cc: Get rid of unnecessary byte-swap calls, some of which were too ambiguous for cygwin (or gcc 3.4.4). dev/pcidev.cc: Disambiguate arg for overloaded byte swap operation (and fix it to be the correct one). --HG-- extra : convert_revision : be37c6315aacbec6332b1d09e726b39b4aa18dce
2005-08-15Changes for getting FreeBSD to run.Miguel Serrano
SConscript: Added more files to compile: dev/pcifake.cc, dev/isa_fake.cc, kern/freebsd/freebsd_system.cc, kern/freebsd/freebsd_events.cc. arch/alpha/isa_traits.hh: Added constant for argument register 2 as it is needed by FreebsdSystem::doCalibrateClocks(). cpu/exec_context.hh: cpu/o3/alpha_cpu.hh: Replaced htoa()s with gtoh() and htog(). cpu/o3/fetch_impl.hh: cpu/simple/cpu.cc: Replaced htoa() with gtoh(). dev/disk_image.cc: Replaced htoa()s with letoh()s. dev/ide_ctrl.cc: Got rid of magic numbers. Added IdeChannel and IdeRegType type names where necessary. dev/ide_ctrl.hh: Got rid of unnecessary macros. Changed RegType_t to IdeRegType. Changed bmi_regs to allow accessing registers by name instead of just by array index. Added IdeChannel enum type to use in place of bool variables which were used to specify IDE channel. dev/ide_disk.cc: Rewrote IdeDisk::read and IdeDisk::write functions to specify registers by name instead of indexing through an array. dev/ide_disk.hh: Updated command register struct. dev/ns_gige.cc: dev/ns_gige.hh: Made ReadConfig and WriteConfig begin with a lower-case letter. writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pciconfigall.cc: writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pcidev.cc: Cleaned up readConfig() and writeConfig() functions. dev/pcidev.hh: Added macros to make code that works with the BARs (base adress registers) more readable. writeConfig() now takes a pointer to data. dev/pcireg.h: Changed PCIConfig struct to make accessing elements more straight forward. Removed type 1 (for PCI-to-PCI bridges) PCI configuration space struct since it is not used. dev/rtcreg.h: Added macros for bit fields in RTC status registers A & B. dev/sinic.cc: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. The accessing of elements of PCIConfig structure is updated. dev/sinic.hh: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. dev/tsunami_io.cc: Added implementation of new RTC and PIT classes. dev/tsunami_io.hh: Added classes for RTC and PIT modules. dev/tsunamireg.h: Added macros for DMA ports used by Tsunami-Tru64. dev/uart8250.cc: Got rid of a magic number. Transmit (Tx) interrupts should clear upon a read of the Interrupt ID register. dev/uart8250.hh: Added comments and macros dealing with the UART Interrupt ID register. kern/linux/linux_system.cc: Replaced htoa() with htog(). python/m5/objects/Pci.py: PciFake is a python class for Pci Devices that do nothing. python/m5/objects/Tsunami.py: TsunamiFake was renamed as IsaFake. sim/system.cc: Replaced htoa()s with htog()s. dev/isa_fake.cc: New BitKeeper file ``dev/isa_fake.cc'' TsunamiFake was renamed as IsaFake. dev/isa_fake.hh: New BitKeeper file ``dev/isa_fake.hh'' TsunmaiFake was renamed as IsaFake. dev/pitreg.h: New BitKeeper file ``dev/pitreg.h'' Useful macros for working with PIT (Periodic Interval Timer) registers. --HG-- extra : convert_revision : 33f3a8a1034af4f6c71b32dd743e371c8613e780