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2006-03-09Hand merge. Stuff probably doesn't compile.Gabe Black
2006-03-08Forward declaration of MemoryController.Kevin Lim
2006-03-07Needs forward declaration of MemoryController.Kevin Lim
2006-03-07Updates for the quiesceEvent that was added to the XC.Kevin Lim
2006-03-05Merge ktlim@zizzer:/bk/m5Kevin Lim
2006-03-04Steps towards setting up the infrastructure to allow the new CPU model to wor...Kevin Lim
2006-03-03Merge zizzer:/bk/m5Ali Saidi
2006-03-03First cut at moving alpha specefic stuff out of /sim/system* intoAli Saidi
2006-03-03Ethernet devices have an RSS option to tell the driver toNathan Binkert
2006-02-28Merge ktlim@zizzer:/bk/m5Kevin Lim
2006-02-28Corrected some mistakes in the hand mergeGabe Black
2006-02-28Hand mergedGabe Black
2006-02-28Merge gblack@m5.eecs.umich.edu:/bk/multiarchGabe Black
2006-02-27Merge ktlim@zizzer:/bk/m5Kevin Lim
2006-02-27Changes to put all the misc regs within the misc reg file. This includes the...Kevin Lim
2006-02-27Changed targetarch to just arch.Gabe Black
2006-02-27MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather t...Gabe Black
2006-02-26add some support for random access of data in packet fifosNathan Binkert
2006-02-25Since the delayed write stuff is gone, get rid of regWriteNathan Binkert
2006-02-24Merge gblack@m5.eecs.umich.edu:/bk/multiarchGabe Black
2006-02-24Changed Fault from a FaultBase * to a RefCountingPtr, added "new"s where appr...Gabe Black
2006-02-23Merge zizzer:/bk/m5Ali Saidi
2006-02-23Get rid of the xc from the alphaAccess/alphaConsole backdoor device.Ali Saidi
2006-02-21Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old...Gabe Black
2006-02-21Rename Port address range functions... like the block sizeSteve Reinhardt
2006-02-21Rename port methods:Steve Reinhardt
2006-02-21Made Addr a global typeGabe Black
2006-02-20Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Gabe Black
2006-02-20Finished the implementing the change of the ISA from a class to a namespaceGabe Black
2006-02-20Get rid of the code that delays PIO write accessesNathan Binkert
2006-02-19Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Gabe Black
2006-02-19Changes to untemplate StaticInst and StaticInstPtr, change the isa to a names...Gabe Black
2006-02-17Get rid of deque (poor memory allocation), switch them over to lists.Kevin Lim
2006-02-16Changed the fault enum into a class, and fixed everything up to work with it....Gabe Black
2006-02-12Removed isa_traits.hh from targetarch, moved vptr.hh from arch/alpha to sim, ...Gabe Black
2006-02-03byte_swap.hh was removed from arch/alpha/, and replaced by sim/byteswap.hh. T...Gabe Black
2006-01-31changed sendresult -> bool,tick,void as appropriateAli Saidi
2005-11-28Virtualized SINIC fixesNathan Binkert
2005-11-25Virtualize sinicNathan Binkert
2005-11-25Add the capability to iterate through the packets in a pktfifo,Nathan Binkert
2005-11-22add the cpu number of the request to various panic and traceNathan Binkert
2005-11-21add support for delaying pio writes until the cache access occursNathan Binkert
2005-11-21have sinic use the new readBar/writeBar stuff that's in theNathan Binkert
2005-11-21Add a bunch of functions to manage the BAR addresses. ThisNathan Binkert
2005-11-20io_bus is split out into pio_bus and dma_bus so that any deviceNathan Binkert
2005-11-11Update random come to always have explict min/maxAli Saidi
2005-11-02Don't call Random.uniform() unnecessarilyAli Saidi
2005-11-02Merge zizzer:/bk/m5Ali Saidi
2005-11-02Add ability to slightly perturb latency of ethernet/memoryAli Saidi
2005-10-21Major changes to sinic device model. Rearrage read/write, betterNathan Binkert