Age | Commit message (Collapse) | Author |
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Switch fault pointers to const pointers to prevent them from accidentally being changed.
Fix some coding style.
arch/alpha/ev5.cc:
cpu/o3/commit_impl.hh:
kern/kernel_stats.hh:
Remove fake fault.
arch/alpha/faults.cc:
Remove fake fault, fix to have normal m5 line length limit, and change pointers to be const pointers so that the default faults aren't changed accidentally.
arch/alpha/faults.hh:
Fix to have normal m5 line length limit, change pointers to const pointers.
sim/faults.cc:
sim/faults.hh:
Remove fake fault, change pointers to const pointers.
--HG--
extra : convert_revision : 01d4600e0d4bdc1d177b32edebc78f86a1bbfe2e
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it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA.
SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
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fixed an include to have the new location, and removed an ambiguating function declaration in byteswap.hh.
SConscript:
Moved isa_fullsys_traits.hh out of targetarch, since the only place it's included, and the only place the comments in the file say it should be included, is in the alpha isa_traits.hh
targetarch/isa_traits.hh is now included through arch/isa_traits.hh
vptr.hh was removed from targetarch, and moved to sim
arch/alpha/pseudo_inst.cc:
Moved vptr.hh from targetarch to sim
base/loader/object_file.hh:
base/loader/symtab.hh:
cpu/base.hh:
dev/ide_disk.cc:
Changed the include of isa_traits.hh from targetarch to arch
cpu/static_inst.hh:
dev/platform.hh:
dev/simple_disk.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/mbuf.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/process.hh:
sim/syscall_emul.hh:
Changed the include of isa_traits.hh from targetarch to arch.
kern/linux/linux_threadinfo.hh:
Changed the include of vptr.hh from targetarch to sim.
sim/byteswap.hh:
Removed the line declaring swap_byte(long), since it ambiguates with swap_byte(int32_t)
sim/vptr.hh:
Fixed the assert in the equals operator.
Changed the AlphaISA namespace reference to TheISA.
Changed arch/alpha/vtophys.hh to targetarch/vtophys.hh, since this file is now for all architectures.
Added an include of arch/isa_traits.hh so that TheISA would be defined.
--HG--
extra : convert_revision : e3c6ac17ed0277cfeba1d35cd63eba66eba5996f
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the isa_desc files, movement of byte_swap.hh into sim, and the creation of arch/isa_traits.hh
SConscript:
Moved some files out of targetarch. The either no longer need to be there, never needed to be there, or should be referred to directly in arch/alpha due to there strictly alpha content.
arch/alpha/isa_traits.hh:
Added alpha's endianness to it's isa_traits.hh
arch/mips/isa_traits.hh:
Added MIPS endianness to it's isa_traits.hh
arch/sparc/isa_traits.hh:
Added SPARCs endianess to it's isa_traits.hh
build/SConstruct:
Added MIPS as a valid architecture
cpu/exec_context.hh:
Included arch/isa_traits.hh to bring in the endianness of the system.
cpu/o3/alpha_cpu.hh:
Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding of little endianness
cpu/o3/fetch_impl.hh:
kern/freebsd/freebsd_system.cc:
Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endianness.
sim/system.cc:
Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endian.
--HG--
extra : convert_revision : b1ab34b7569db531cd1c74f273b24222e63f9007
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The new file uses LittleEndianGuest and BigEndianGuest namespaces to allow selecting the appropriate functions.
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
Added the endianness namespace. This may change.
cpu/exec_context.hh:
Changed the include path for byteswap, and forced LittleEndianness for lack of a better solution.
cpu/o3/alpha_cpu.hh:
Forced LittleEndianness, for lack of a better solution.
cpu/o3/alpha_cpu_impl.hh:
Cleared away some commented out code.
cpu/o3/fetch_impl.hh:
Changed the include patch for byteswap, and forced LittleEndianness for lack of a better solution.
cpu/simple/cpu.cc:
Added an include for byteswap.hh, and fixed the SimpleCPU to LittleEndian. This cpu only does alpha, so that's fine.
dev/disk_image.cc:
Changed the include path of byteswap.hh
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
Added an include for byteswap.hh, and forced LittleEndianness for lack of a better solution.
sim/system.cc:
Forced LittleEndianness for lack of a better solution.
--HG--
extra : convert_revision : b95d3e1265a825e04bd77622a3ac09fbac6bd206
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SConscript:
Get rid of the pc_sample stuff and move to the new profiling stuff
base/traceflags.py:
DPRINTF Stack stuff
cpu/base.cc:
cpu/base.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
Add profiling stuff
kern/kernel_stats.hh:
Use a smart pointer
sim/system.cc:
sim/system.hh:
Create a new symbol table that has all of the symbols for a
particular system
util/stats/categories.py:
change around the categories, add categories for function
profiling stuff
util/stats/profile.py:
No profile parsing and display code to deal with function
profiling stuff, graph, dot, and text outputs.
--HG--
extra : convert_revision : b3de0cdc8bd468e42647966e2640ae009bda9eb8
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kern/linux/linux_system.cc:
remove random character
kern/linux/linux_threadinfo.hh:
Formatting fixes
--HG--
extra : convert_revision : 2be4772d7455ea1f4eb22966e00831701b7cbc27
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including automatically fixing up addresses to deal with
optionally executed Alpha gp update prolog.
SConscript:
Remove freebsd_events.cc and linux_events.cc.
base/remote_gdb.cc:
cpu/pc_event.cc:
kern/system_events.cc:
kern/system_events.hh:
PCEvents now schedule themselves in constructor.
cpu/pc_event.hh:
PCEvents now schedule themselves in the constructor.
Get rid of constructor versions that don't take an address and
all the schedule() methods that are now unnecessary.
kern/freebsd/freebsd_system.cc:
kern/freebsd/freebsd_system.hh:
Use new System methods to schedule function-based events.
Move FreeBSD-specific function event classes into FreebsdSystem.
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
Use new System methods to schedule function-based events.
Move Linux-specific function event classes into LinuxSystem.
kern/tru64/tru64_events.hh:
PCEvents now schedule themselves in constructor.
Add DebugPrintfrEvent to encapsulate raw setting as new type
(to work better with new System function-event method.)
kern/tru64/tru64_system.cc:
Use new System methods to schedule function-based events.
kern/tru64/tru64_system.hh:
Add DebugPrintfrEvent to encapsulate raw setting as new type
(to work better with new System function-event method.)
sim/system.cc:
sim/system.hh:
Add functions to set up function-based events, including
automatically fixing up addresses to deal with optionally
executed Alpha gp update prolog.
--HG--
extra : convert_revision : c2cf09144297b6602afe755a34a0a2227023783f
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kern/linux/linux_system.cc:
Don't hard code the address of the command line in the kernel,
instead, deduce it from the location of known symbols.
don't use strcpy, it's dangerous.
kern/linux/linux_system.hh:
Don't hard code the address of the command line in the kernel,
instead, deduce it from the location of known symbols.
--HG--
extra : convert_revision : 128b1d5dbd00b0b8571707da99f86f76e29abfd1
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kern/freebsd/freebsd_system.cc:
Use htog instead of htoa.
--HG--
extra : convert_revision : 09224d60ce5bb3827c9f046127ff6fc72fa008d6
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into zed.eecs.umich.edu:/z/benash/bk/m5
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/rtcreg.h:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/uart8250.cc:
dev/uart8250.hh:
python/m5/objects/Tsunami.py:
Merge code.
--HG--
extra : convert_revision : e97d5dbcc051d2061622201265430d359f995d48
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SConscript:
Added more files to compile: dev/pcifake.cc, dev/isa_fake.cc, kern/freebsd/freebsd_system.cc, kern/freebsd/freebsd_events.cc.
arch/alpha/isa_traits.hh:
Added constant for argument register 2 as it is needed by FreebsdSystem::doCalibrateClocks().
cpu/exec_context.hh:
cpu/o3/alpha_cpu.hh:
Replaced htoa()s with gtoh() and htog().
cpu/o3/fetch_impl.hh:
cpu/simple/cpu.cc:
Replaced htoa() with gtoh().
dev/disk_image.cc:
Replaced htoa()s with letoh()s.
dev/ide_ctrl.cc:
Got rid of magic numbers.
Added IdeChannel and IdeRegType type names where necessary.
dev/ide_ctrl.hh:
Got rid of unnecessary macros.
Changed RegType_t to IdeRegType.
Changed bmi_regs to allow accessing registers by name instead of just by array index.
Added IdeChannel enum type to use in place of bool variables which were used to specify IDE channel.
dev/ide_disk.cc:
Rewrote IdeDisk::read and IdeDisk::write functions to specify registers by name instead of indexing through an array.
dev/ide_disk.hh:
Updated command register struct.
dev/ns_gige.cc:
dev/ns_gige.hh:
Made ReadConfig and WriteConfig begin with a lower-case letter.
writeConfig() now takes a pointer to data as a parameter instead of a copy of data.
dev/pciconfigall.cc:
writeConfig() now takes a pointer to data as a parameter instead of a copy of data.
dev/pcidev.cc:
Cleaned up readConfig() and writeConfig() functions.
dev/pcidev.hh:
Added macros to make code that works with the BARs (base adress registers) more readable. writeConfig() now takes a pointer to data.
dev/pcireg.h:
Changed PCIConfig struct to make accessing elements more straight forward. Removed type 1 (for PCI-to-PCI bridges) PCI configuration space struct since it is not used.
dev/rtcreg.h:
Added macros for bit fields in RTC status registers A & B.
dev/sinic.cc:
Function name change: WriteConfig --> writeConfig.
writeConfig() now takes a pointer to data instead of a copy of data.
The accessing of elements of PCIConfig structure is updated.
dev/sinic.hh:
Function name change: WriteConfig --> writeConfig.
writeConfig() now takes a pointer to data instead of a copy of data.
dev/tsunami_io.cc:
Added implementation of new RTC and PIT classes.
dev/tsunami_io.hh:
Added classes for RTC and PIT modules.
dev/tsunamireg.h:
Added macros for DMA ports used by Tsunami-Tru64.
dev/uart8250.cc:
Got rid of a magic number.
Transmit (Tx) interrupts should clear upon a read of the Interrupt ID register.
dev/uart8250.hh:
Added comments and macros dealing with the UART Interrupt ID register.
kern/linux/linux_system.cc:
Replaced htoa() with htog().
python/m5/objects/Pci.py:
PciFake is a python class for Pci Devices that do nothing.
python/m5/objects/Tsunami.py:
TsunamiFake was renamed as IsaFake.
sim/system.cc:
Replaced htoa()s with htog()s.
dev/isa_fake.cc:
New BitKeeper file ``dev/isa_fake.cc''
TsunamiFake was renamed as IsaFake.
dev/isa_fake.hh:
New BitKeeper file ``dev/isa_fake.hh''
TsunmaiFake was renamed as IsaFake.
dev/pitreg.h:
New BitKeeper file ``dev/pitreg.h''
Useful macros for working with PIT (Periodic Interval Timer) registers.
--HG--
extra : convert_revision : 33f3a8a1034af4f6c71b32dd743e371c8613e780
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dev/ns_gige.cc:
Added FreeBSD support. Required additional register read/write functionality, hash filtering (faked), and EEPROM read access.
dev/ns_gige.hh:
Added constants and variables for FreeBSD support. Also created eepromKick() to advance state machine.
dev/ns_gige_reg.h:
Defined additional register bit fields.
dev/pcidev.cc:
Fix &= typo.
dev/sinic.cc:
Remove an INIT_PARAM_DFLT macro.
dev/tsunami_io.cc:
Fix DPRINTF typo.
kern/freebsd/freebsd_system.cc:
Edit comments.
--HG--
extra : convert_revision : 37aaa1303d57d3784381e85acb3bc1743adeb8c0
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into zed.eecs.umich.edu:/z/benash/bk/m5
SConscript:
dev/ide_disk.hh:
Formatting.
dev/ide_ctrl.cc:
Endianness
dev/ide_disk.cc:
dev/pcidev.cc:
dev/tsunami_io.cc:
dev/uart8250.cc:
Clean up code.
--HG--
extra : convert_revision : cb554f0e3a701371d2106cd7e11a4a22f773acc2
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dev/pciconfigall.cc:
removed union.
dev/pcidev.cc:
.
dev/rtcreg.h:
more macros to avoid magic numbers.
dev/tsunami_io.cc:
replaced magic numbers, no more advancing RTC as it isn't reaaly necessary.
dev/tsunami_io.hh:
removed declarations of things that go unused.
dev/uart8250.cc:
reading the Interrupt ID register should clear TX interrupt flag.
dev/uart8250.hh:
useful #defines.
kern/freebsd/freebsd_system.cc:
kern/freebsd/freebsd_system.hh:
nothing.
python/m5/objects/Pci.py:
new PciFake.
--HG--
extra : convert_revision : 88259704f5b215591d1416360180810fcda14d26
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dev/ide_disk.cc:
Don't initialize data to 0.
--HG--
extra : convert_revision : 643bcf15b52c3e14231d8136b8cb049a8896457a
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--HG--
extra : convert_revision : 1ed206b27498641b64d7f35c74ea1f0623398d4e
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kern/freebsd/freebsd_system.cc:
kern/freebsd/freebsd_system.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/aligned.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/sched.hh:
kern/linux/thread_info.hh:
kern/system_events.cc:
kern/system_events.hh:
Remove unecessary #include statements.
--HG--
extra : convert_revision : 7e32d3b096fc92708ea45db9b172bada906024cd
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improve FreeBSD compatibility.
dev/ide_disk.cc:
Make ide disk set interrupts correctly.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Implement read of timer counts.
kern/freebsd/freebsd_system.cc:
kern/freebsd/freebsd_system.hh:
Remove SkipFuncEvents that we don't need to skip.
python/m5/objects/Tsunami.py:
Add size parameter to TsunamiFake class.
--HG--
extra : convert_revision : a87e74f2cac0036060ca8cb3fde4760d8c91a5db
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SConscript:
Added kern/freebsd/freebsd_events.cc.
arch/alpha/isa_traits.hh:
Added Argument to support replacement of calibrate_clocks function in FreeBSD.
dev/ns_gige.hh:
Fixed NIC model number typo.
dev/tsunami_io.cc:
Added support for RTC writes and PIC 2 mask reads. Made RTC static member.
dev/tsunami_io.hh:
Made RTC static member.
kern/freebsd/freebsd_system.cc:
Added events to skip functions in FreeBSD.
kern/freebsd/freebsd_system.hh:
Added events to skip certain functions.
--HG--
extra : convert_revision : 8aaca51d3f9b1bb601722a5bae240aae77b445db
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SConscript:
Included kern/freebsd/freebsd_system.cc
--HG--
extra : convert_revision : 4fa31602acb511b16bf371f78a8e5a8082536b88
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kern/linux/linux_threadinfo.hh:
kern/linux/sched.hh:
changed names slightly
--HG--
extra : convert_revision : 8e42ebee1d749a65b78af5733de9e0deda3c548e
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are ours
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
sim/process.cc:
sim/process.hh:
remove $Id$ string
cpu/ozone/cpu.cc:
cpu/ozone/cpu_impl.hh:
cpu/ozone/ea_list.cc:
cpu/ozone/ea_list.hh:
kern/linux/sched.hh:
kern/linux/thread_info.hh:
Add M5 Copyright
cpu/trace/opt_cpu.cc:
dev/rtcreg.h:
nit
kern/linux/aligned.hh:
kern/linux/hwrpb.hh:
util/oprofile-top.py:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
Cleanup copyright
--HG--
extra : convert_revision : 4274e9121ef7543e0b3999b31e935edb19c54d46
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Update copyright dates and author list
SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
build/SConstruct:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/memtest/memtest.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunamireg.h:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
python/SConscript:
python/m5/__init__.py:
python/m5/config.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/genini.py:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/ccdrv/devtime.c:
util/m5/m5.c:
util/oprofile-top.py:
util/rundiff:
util/m5/m5op.h:
util/m5/m5op.s:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
util/tap/tap.cc:
Update copyright dates and author list
--HG--
extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
|
|
kern/linux/sched.hh:
kern/linux/thread_info.hh:
got rid of everything but exactly what we needed
util/categories.py:
newest version from one of my repositories
--HG--
extra : convert_revision : c4328e5938d421d60493c0da07022bfa9e92c404
|
|
--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
|
|
--HG--
extra : convert_revision : b868e7920eaa3682c6123651f0c598673ebb7f22
|
|
inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version.
SConscript:
arch/isa_parser.py:
cpu/base_dyn_inst.cc:
Remove OOO CPU stuff.
arch/alpha/faults.hh:
Add fake memory fault. This will be removed eventually.
arch/alpha/isa_desc:
Change EA comp and Mem accessor to be const StaticInstPtrs.
cpu/base_dyn_inst.hh:
Update read/write calls to use load queue and store queue indices.
cpu/beta_cpu/alpha_dyn_inst.hh:
Change to const StaticInst in the register accessors.
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
Update syscall code with thread numbers.
cpu/beta_cpu/alpha_full_cpu.hh:
Alter some of the full system code so it will compile without errors.
cpu/beta_cpu/alpha_full_cpu_builder.cc:
Created a DerivAlphaFullCPU class so I can instantiate different CPUs that have different template parameters.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
Update some of the full system code so it compiles.
cpu/beta_cpu/alpha_params.hh:
cpu/beta_cpu/fetch_impl.hh:
Remove asid.
cpu/beta_cpu/comm.hh:
Remove global history field.
cpu/beta_cpu/commit.hh:
Comment out rename map.
cpu/beta_cpu/commit_impl.hh:
Update some of the full system code so it compiles. Also change it so that it handles memory instructions properly.
cpu/beta_cpu/cpu_policy.hh:
Removed IQ from the IEW template parameter to make it more uniform.
cpu/beta_cpu/decode.hh:
Add debug function.
cpu/beta_cpu/decode_impl.hh:
Slight updates for decode in the case where it causes a squash.
cpu/beta_cpu/fetch.hh:
cpu/beta_cpu/rob.hh:
Comment out unneccessary code.
cpu/beta_cpu/full_cpu.cc:
Changed some of the full system code so it compiles. Updated exec contexts and so forth to hopefully make multithreading easier.
cpu/beta_cpu/full_cpu.hh:
Updated some of the full system code to make it compile.
cpu/beta_cpu/iew.cc:
Removed IQ from template parameter to IEW.
cpu/beta_cpu/iew.hh:
Removed IQ from template parameter to IEW. Updated IEW to recognize the Load/Store queue.
cpu/beta_cpu/iew_impl.hh:
New handling of memory instructions through the Load/Store queue.
cpu/beta_cpu/inst_queue.hh:
Updated comment.
cpu/beta_cpu/inst_queue_impl.hh:
Slightly different handling of memory instructions due to Load/Store queue.
cpu/beta_cpu/regfile.hh:
Updated full system code so it compiles.
cpu/beta_cpu/rob_impl.hh:
Moved some code around; no major functional changes.
cpu/ooo_cpu/ooo_cpu.hh:
Slight updates to OOO CPU; still does not work.
cpu/static_inst.hh:
Remove OOO CPU stuff. Change ea comp and mem acc to return const StaticInst.
kern/kernel_stats.hh:
Extra forward declares added due to compile error.
--HG--
extra : convert_revision : 594a7cdbe57f6c2bda7d08856fcd864604a6238e
|
|
kern/linux/linux_system.cc:
calibrate delay starts three instructions after the symbol now.
--HG--
extra : convert_revision : f9c2bed3bca1f3394801fe7696cfff870443c204
|
|
cpu/pc_event.cc:
Add a newline to the printout to clean up output
kern/linux/linux_system.cc:
Remove the die_if_kernel pc break event, it is being called when not the kernel and leads to unneeded printouts
--HG--
extra : convert_revision : c359532db31c961074894cc6c44c8452592caca8
|
|
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
|
|
cpu/simple_cpu/simple_cpu.hh:
Merge
--HG--
extra : convert_revision : 1b6003ac731051fefacb7d7a30c317553b4bf1bc
|
|
Increase the default number of CSHR's, we should really fix this or make it a parameter
Use a setBlocked call to tell the bus it should block
New technique for sampling and switchover:
1) Sampler switchover event happens
2) All cpus in the current phase of sampling associated with this sampler are signaled to switchover
3) Each cpu drains it's pipe of things being executed (stops fetching and waits for empty pipe)
4) Once the pipe is empty the cpu calls back to the sampler to signal it has finished, and moves into the switchedout state (continues not to fetch)
5) The sampler collects all the signals, once all cpus are drained it calls the new cpu's in the next phase to takeover from the correct cpu
6) The statistics are reset and the next switchover time is calculated from this point
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
Reconfigure the way the sampling switchover works
cpu/pc_event.cc:
More debugging information on kernel panic's
kern/linux/linux_system.cc:
More debug info for Kernel Die events
kern/linux/linux_system.hh:
More debug info for kernel die events
--HG--
extra : convert_revision : 61cc42e43ba738705aa1f1d167b65d4d6dee51ae
|
|
sim/param.cc:
Merge changes.
--HG--
extra : convert_revision : b5044e1f7c48ae2d74d5233dd4fabfb7a801d7c8
|
|
wierd ini files. The ini files are still used as an intermediate step,
but a sophisticated python library exists to help build them more
easily.
SConscript:
add the new embedded file stuff
remove all of the old object description junk
base/inifile.cc:
base/inifile.hh:
get rid of findDefault and findAppend since they were the source
of much evil.
base/trace.cc:
For now, if we don't have the dprintf_stream set up, dump
to standard out. We probably want a command line option
for this.
dev/alpha_console.cc:
PioDevice now takes a platform parameter.
All PioDevices must have a pio_latency parameter. We stick
a dummy parameter in here for now until we get rid of the
builder stuff.
dev/alpha_console.hh:
don't need Platform anymore
dev/baddev.cc:
PioDevice now takes a platform parameter.
All PioDevices must have a pio_latency parameter. We stick
a dummy parameter in here for now until we get rid of the
builder stuff. Same for the platform parameter, though we just
pass the PioDevice a null parameter since it isn't used by
this device and it's quicker.
dev/baddev.hh:
fix #include guards
dev/etherlink.cc:
rename parameters.
dev/ethertap.cc:
rename parameters
dev/ide_ctrl.cc:
All devices need an address even if it will get overwritten later.
dev/ide_disk.cc:
use an enum for the drive ID stuff.
rename disk_delay -> delay
Actually, I think that we should implement "cable select" and
have the controller tell the drive what it is.
dev/io_device.cc:
dev/io_device.hh:
All IO devices take a Platform *
dev/ns_gige.cc:
all devices need an io_bus. rename header_bus to io_bus
We don't need stuff for the interrupt controller since
it's all in the platform now.
dev/ns_gige.hh:
We don't need stuff for the interrupt controller now since
it's all in the platform.
dev/pciconfigall.cc:
Pass a dummy NULL to the PioDevice for the platform since
we don't need one.
dev/pcidev.cc:
Move a bunch of common functionality into the PciDev
dev/platform.hh:
remove unneeded code
dev/tsunami.cc:
remove unused param
dev/tsunami_cchip.cc:
pass platform pointer
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
pass platform variable
dev/uart.hh:
don't need to keep a platform pointer. it's in the base class
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
rename some parameters
sim/builder.cc:
clean up builder code. use more parameters from the
config node. all sections with a type= are now created,
the old mechanisms no longer work
sim/builder.hh:
remove some extra variables since they are found in the ConfigNode
sim/main.cc:
add a quick hack command line argument -X to dump out the
embedded files. (probably should be fixed up a little.)
accept .mpy files
printing to the streams has to happen after the hierarchy
is built since we're moving away from param contexts
sim/param.cc:
add parsing support for ranges
sim/process.cc:
isValid isn't very useful anymore. interpret the names
stdout, stderr, cout, cerr for the file descriptors
sim/pyconfig/SConscript:
Add Action handlers for creating an embedded python file
and for creating an embedded C file.
use these action handlers to embed all objects found in the objects
tree into the binary along with the importer and the m5config stuff
sim/pyconfig/m5config.py:
Major changes to the original configuration file generator. These
changes largely involve implementing copy-on-write like semantics
for all of the SimObjects. Real documentation must be written.
sim/universe.cc:
Universe becomes a SimObject since we don't really have the notion of
param contexts in the python code.
--HG--
rename : sim/pyconfig/m5configbase.py => sim/pyconfig/m5config.py
extra : convert_revision : c353453e5beb91c37f15755998fc0d8858c6829a
|
|
changes come from templated code,
which is evaluated slightly differently than in previous versions of gcc.
arch/alpha/alpha_linux_process.cc:
Alphabetize includes.
arch/alpha/vptr.hh:
Change the constants that are being used for alpha pagebytes to come from the ISA.
base/random.hh:
cpu/static_inst.cc:
sim/param.cc:
Fix up template syntax.
base/range.hh:
Include iostream for << operator.
base/res_list.hh:
base/statistics.hh:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.hh:
sim/eventq.hh:
sim/param.hh:
Fixup for templated code to resolve different scope lookup in gcc 3.4. This defers the lookup of the
function/variable until actual instantiation time by making it dependent on the templated class/function.
base/trace.cc:
Fix call to new.
base/trace.hh:
Fix up #define to have full path.
cpu/base_cpu.cc:
Fix up call to new.
dev/etherlink.hh:
dev/ns_gige.hh:
dev/sinic.hh:
Fixup for friend class/function declaration. g++ 3.4 no longer allows typedefs to be declared as
a friend class.
dev/pcidev.hh:
Fix up re-definition of access level to params.
kern/linux/linux_syscalls.hh:
kern/tru64/tru64_syscalls.hh:
Fix up header. Fix up template syntax.
sim/serialize.cc:
Include errno.h.
sim/startup.cc:
Change startupq. queue was getting destructed before all things had called ~StartupCallback(), which lead
to a segfault. This puts startupq in global space, and we allocate it ourselves. Other code may be similar
to this and may need changing in the future.
sim/syscall_emul.hh:
Include cpu/exec_context.hh and sim/process.hh, as forward declarations are no longer sufficient.
sim/universe.cc:
Include errno.h
--HG--
extra : convert_revision : e49d08ee89eb06a28351f02bafc028ca6652d5af
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base/loader/symtab.cc:
base/loader/symtab.hh:
Get rid of old unused calls.
cpu/simple_cpu/simple_cpu.hh:
No need to include base/loader/symtab.hh
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
Include base/loader/symtab.hh (since it's no longer included in system.hh)
sim/system.hh:
Replace include of base/loader/symtab.hh with forward class decl.
--HG--
extra : convert_revision : 3a778c2f409ec94e3b00eaa9b3859943cb39918c
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into zizzer.eecs.umich.edu:/z/stever/bk/m5
--HG--
extra : convert_revision : 033375b63b56104a5c1823985eeee7bb6cdcc7de
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Simple text list of symbol (or address) and count
will be dumped to m5prof.<cpu-name> if the cpu's
pc_sample_interval param is set.
SConscript:
Add cpu/full_cpu/pc_sample_profile.cc
base/callback.hh:
Add a comment about MakeCallback.
Fix type in another comment.
base/loader/symtab.cc:
Revamp findNearestSymbol() to provide addresses of both
nearest symbols (preceding and following) as well as
string for former.
Move global definition of debugSymbolTable here too.
base/loader/symtab.hh:
Revamp findNearestSymbol() to provide addresses of both
nearest symbols (preceding and following) as well as
string for former.
Move global declaration of debugSymbolTable here too.
cpu/exetrace.cc:
Use new findNearestSymbol() interface for trace symbols.
kern/linux/linux_system.cc:
sim/system.cc:
Remove extern of debugSymbolTable (now in symtab.hh)
sim/process.cc:
Initialize debugSymbolTable if binary has a symbol table.
--HG--
extra : convert_revision : 0b5393dc39c40ac88c953684708f1125da550671
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--HG--
extra : convert_revision : fb890907402b7c1e873a2ac32e72cb6e0ed73f13
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all macros in ev5.hh to inline functions or constant typed
variables and make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/ev5.cc:
arch/alpha/isa_desc:
dev/ns_gige.cc:
kern/tru64/tru64_events.cc:
deal with changes in ev5.hh
arch/alpha/ev5.hh:
Macros are nasty, so let's get rid of them. Convert all
all macros to inline functions or constant typed variables.
Make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/isa_traits.hh:
move some of the ev5 specific code into the isa
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
deal with isa addition
cpu/exec_context.hh:
be less isa specific and use the isa traits to figure out
what we can.
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
deal with changes in ev5.hh
I don't believe this masking is actually necessary. We should
look at removing it later.
dev/ide_ctrl.cc:
sort #includes
deal with changes in ev5.hh
--HG--
extra : convert_revision : c8a3adf0a4b1d198aefe38fc38b295abf289b08a
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clean up a few other things while we're here.
base/bitfield.hh:
base/compression/null_compression.hh:
dont #include <inttypes.hh> use "sim/host.hh"
fix #include guard
base/stats/types.hh:
dont #include <inttypes.hh> use "sim/host.hh"
kern/linux/aligned.hh:
dont #include <stdint.hh> use "sim/host.hh"
fix #include guard
kern/linux/hwrpb.hh:
fix #include guard
--HG--
extra : convert_revision : 288c687a59a1e770bbb834879173e1a2ea371bce
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functions instead of preprocessor macros.
arch/alpha/vtophys.cc:
use new constants, functions and structs to clean up the
vtophys code.
arch/alpha/vtophys.hh:
Clean up a little bit and make the protypes match new changes.
base/remote_gdb.cc:
dev/ide_disk.cc:
kern/tru64/tru64_events.cc:
use new constants from isa_traits.hh instead of ones from
old pmap.h
--HG--
extra : convert_revision : 5dce34e3b0c84ba72cefca34e5999b99898edcef
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instead of using symlink. The symlink broke scons's built-in include
dependency tacking.
Interestingly once it was fixed scons discovered two circular dependency
problems which are also fixed now.
SConscript:
Make targetarch directory in build tree and copy arch/alpha files to it
instead of using symlink. The symlink broke scons's built-in include
dependency tacking.
arch/alpha/ev5.hh:
Get rid of circular #include dependence.
kern/kernel_stats.cc:
Add needed header file.
kern/linux/linux_syscalls.hh:
kern/tru64/tru64_syscalls.hh:
Replace targetarch/syscalls.hh with single template class declaration.
--HG--
extra : convert_revision : b8551623c1d441c6eb8d0651387e97e373128814
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kern/kernel_stats.cc:
Few more items to serialize
--HG--
extra : convert_revision : b816512735928cbde0b24bf8cb48deec9fb26413
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kern/kernel_stats.cc:
Serialize idleProcess.
kern/system_events.cc:
Remove the idle start event once it runs.
--HG--
extra : convert_revision : 05ac574558a88b86ccfce963e4ca9b037a1a8509
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kern/linux/linux_system.cc:
Don't scheduling interrupt events if we are not binning interrupts
kern/tru64/tru64_system.cc:
set the bin_int boolean in the system structure
--HG--
extra : convert_revision : 68eea9c448f1c481fc79be1777acb536d6385495
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code
arch/alpha/alpha_memory.cc:
Fixed unaligned trap faults
arch/alpha/ev5.cc:
little more verbose faulting information
kern/linux/linux_system.cc:
more descriptive errors, and the correct offsets from symbols
sim/system.cc:
load local pal symbols
--HG--
extra : convert_revision : 0c81badf77321d5e1a060dcae2d42204e5a1fc84
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cpu/pc_event.cc:
mask off lower three bits so we can have an event in palcode
--HG--
extra : convert_revision : 49fcdc5c359ca2bd9149f092f80f77abcd7b20ee
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arch/alpha/ev5.cc:
set the mode explictly rather than having a bool user/notuser
cpu/simple_cpu/simple_cpu.hh:
there is no class Kernel
kern/kernel_stats.cc:
use cpu_mode_num
kern/kernel_stats.hh:
add interrupt mode and use cpu_mode_num rather than constant
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/system_events.cc:
kern/system_events.hh:
add events to change the mode to/from interrupt
sim/system.cc:
sim/system.hh:
add a pal symbol table
--HG--
extra : convert_revision : 9d30e826b72122062a5ea12d094f94760e75c66a
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