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SE mode now has a port that goes to whatever toplevel mem object the
CPU sees that does the appropriate translation for syscall emulation
SConscript:
translating port is a syscall emu only source
arch/alpha/system.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
Use the new functional port to write the binaries into memory
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/simple/cpu.cc:
We aren't always going to be writing straight to memory with syscalls
support writing to a cache
mem/port.hh:
Add a simple unidirectional functional port that panics on any incoming requests
mem/translating_port.hh:
make translating port inherit from the simple port
sim/system.cc:
sim/system.hh:
Add a functional port that is used to load the original binaries
--HG--
extra : convert_revision : 9096866d0b23e3aceea68394abb76e63c0f8fd8d
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arch/alpha/arguments.cc:
rather than returning 0, put a panic in... it will actually make us fix
this rather than scratching our respective heads
base/loader/object_file.cc:
base/loader/object_file.hh:
Object loader now takes a port rather than a translating port
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
sim/process.cc:
Make translating port a type of port rather than anything special
cpu/simple/cpu.cc:
no need to grab a port from the cpu anymore
mem/physical.cc:
add an additional type of port to physicalmemory called "functional"
Only used for functional accesses (loading binaries/syscall emu)
mem/port.hh:
make readBlok/writeBlob virtual so translating port can do the
translation first
mem/translating_port.cc:
mem/translating_port.hh:
Make TranslatingPort inherit from Port
sim/system.cc:
header file that doesn't exit removed
--HG--
extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
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there.
Get rid of addPort().
Change getPort() behavior on PhysicalMemory.
SConscript:
cpu/simple/cpu.hh:
sim/system.cc:
sim/system.hh:
Replace Memory with MemObject.
cpu/base.hh:
No need to declare Port here anymore.
cpu/cpu_exec_context.hh:
Need PageTable definition.
cpu/simple/cpu.cc:
mem/physical.cc:
mem/physical.hh:
Replace Memory with MemObject.
Get rid of addPort(); allow getting anonymous ports with getPort().
mem/translating_port.hh:
Remove unneeded header.
sim/process.cc:
Replace Memory with MemObject.
Change how initialization port gets set up to deal with change in
addPort()/getPort(). Current solution is not ideal but it works.
sim/process.hh:
Remove unneeded headers and declarations.
Make LiveProcess::getDesc() abstract instead of panicing if called.
sim/syscall_emul.hh:
Fix includes.
--HG--
extra : convert_revision : 11d4ffb54230038afcf7219cc46e51f809329a2f
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--HG--
extra : convert_revision : 1456308af0fd686dff53ec1baddd7747354e1c0a
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- know nothing about Fault objects (as it should be)
- call fatal() by default on accesses to unmapped addrs
- provide "try" versions for callers that are prepared to handle failure
mem/translating_port.cc:
mem/translating_port.hh:
Memory system objects should not return Fault objects, just errors.
Half the time we don't check the return code anyway, so make
default version of the access functions call fatal().
Provide "try*" versions that return a bool for places where we
really are going to check the return code.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Need to use new "tryReadString" here since we actually check the return code.
--HG--
extra : convert_revision : 039737398ef183904dc382c05912ab96cd1d4a51
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Ignoring returned latency for now.
Refactored loadSections in ObjectFile hierarchy.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
Have each section record a pointer to image data.
This allows us to move common loadSections code into ObjectFile.
base/loader/object_file.cc:
Have each section record a pointer to image data.
This allows us to move common loadSections code into ObjectFile.
Also explicitly load BSS now since we need to allocate the
translations for it in syscall emulation.
cpu/base.hh:
Don't need memPort (just pass port in to ExecContext constructor).
cpu/exec_context.cc:
cpu/exec_context.hh:
mem/port.cc:
mem/translating_port.cc:
mem/translating_port.hh:
Pass syscall emulation Port into constructor instead of
getting it from BaseCPU.
cpu/simple/cpu.cc:
Explicitly choose one of three timing models.
Statically allocate request and packet objects when possible.
Several more minor bug fixes.
Works for simple program with SIMPLE_CPU_MEM_IMMEDIATE model now.
Probably have memory leaks with SIMPLE_CPU_MEM_TIMING (if it works at all).
Pass syscall emulation Port into constructor instead of
getting it from BaseCPU.
cpu/simple/cpu.hh:
Explicitly choose one of three timing models.
Statically allocate request and packet objects when possible.
Pass syscall emulation Port into constructor instead of
getting it from BaseCPU.
mem/physical.cc:
Set packet result field.
--HG--
extra : convert_revision : 359d0ebe4b4665867f4e26e7394ec0f1d17cfc26
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memory access (I think because we're deallocating our one and only
CpuRequest object).
base/loader/aout_object.cc:
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
Add flag to force allocation of new pages on data writes.
cpu/simple/cpu.cc:
Several minor fixes.
Switch to atomic mode for now.
mem/physical.hh:
Don't copy the packet to the response event, just keep a reference
to the original.
mem/translating_port.cc:
mem/translating_port.hh:
Add parameter to writeBlobFunctional() to force allocation of
unallocated pages on writes.
--HG--
extra : convert_revision : 05cb31c7b0047b492dcfa0d12ddee690ef762b44
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virtual, no need for memory to define them.
mem/physical.cc:
Return 0 for block size. The chunk generator should treat this as a infinite size.
mem/physical.hh:
Add function prototype
mem/port.hh:
Fix function to take no arguments
mem/translating_port.cc:
mem/translating_port.hh:
Remove the memsetBlob because it doesn't exist yet.
--HG--
extra : convert_revision : dfe352acfc2912ecc9a1ba1863e5666f46b991cc
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stever wrote to break up address ranges into blk/page size chunks.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
Add read/write blob definitions, still need to break it up into blk size chunks (where was the code stever wrote for that?)
mem/physical.hh:
Remove un-needed function (I think)
mem/port.hh:
Default these virtual functions to panic unimplented
mem/translating_port.cc:
Again handling read/write string properly.
Need the stever code to break things into page size chunks yet
mem/translating_port.hh:
Having trouble with the const declerator. I will need to read how it works, for now it compiles if I remove it.
--HG--
extra : convert_revision : f174e06700daa9967958d18e01798270c90d6dac
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via the page table before accessing the memory port.
Other compile issues cleaned up.
SConscript:
Changes to compile the new Translating Port.
Split out memtester and eio support, will rework them back in after first getting a simpleCPU to work
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Changes to use the new translating Port.
cpu/exec_context.cc:
cpu/exec_context.hh:
Create a translating port in each execution context.
sim/process.cc:
Fix the way we do proxy memory
--HG--
extra : convert_revision : 3d33218fe8b425a5d9ce24757f1112b4aa6001fd
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