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path: root/python/m5/config.py
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2006-05-22New directory structure:Steve Reinhardt
- simulator source now in 'src' subdirectory - imported files from 'ext' repository - support building in arbitrary places, including outside of the source tree. See comment at top of SConstruct file for more details. Regression tests are temporarily disabled; that syetem needs more extensive revisions. SConstruct: Update for new directory structure. Modify to support build trees that are not subdirectories of the source tree. See comment at top of file for more details. Regression tests are temporarily disabled. src/arch/SConscript: src/arch/isa_parser.py: src/python/SConscript: Update for new directory structure. --HG-- rename : build/SConstruct => SConstruct rename : build/default_options/ALPHA_FS => build_opts/ALPHA_FS rename : build/default_options/ALPHA_FS_TL => build_opts/ALPHA_FS_TL rename : build/default_options/ALPHA_SE => build_opts/ALPHA_SE rename : build/default_options/MIPS_SE => build_opts/MIPS_SE rename : build/default_options/SPARC_SE => build_opts/SPARC_SE rename : Doxyfile => src/Doxyfile rename : SConscript => src/SConscript rename : arch/SConscript => src/arch/SConscript rename : arch/alpha/SConscript => src/arch/alpha/SConscript rename : arch/alpha/aout_machdep.h => src/arch/alpha/aout_machdep.h rename : arch/alpha/arguments.cc => src/arch/alpha/arguments.cc rename : arch/alpha/arguments.hh => src/arch/alpha/arguments.hh rename : arch/alpha/ecoff_machdep.h => src/arch/alpha/ecoff_machdep.h rename : arch/alpha/ev5.cc => src/arch/alpha/ev5.cc rename : arch/alpha/ev5.hh => src/arch/alpha/ev5.hh rename : arch/alpha/faults.cc => src/arch/alpha/faults.cc rename : arch/alpha/faults.hh => src/arch/alpha/faults.hh rename : arch/alpha/freebsd/system.cc => src/arch/alpha/freebsd/system.cc rename : arch/alpha/freebsd/system.hh => src/arch/alpha/freebsd/system.hh rename : arch/alpha/isa/branch.isa => src/arch/alpha/isa/branch.isa rename : arch/alpha/isa/decoder.isa => src/arch/alpha/isa/decoder.isa rename : arch/alpha/isa/fp.isa => src/arch/alpha/isa/fp.isa rename : arch/alpha/isa/int.isa => src/arch/alpha/isa/int.isa rename : arch/alpha/isa/main.isa => src/arch/alpha/isa/main.isa rename : arch/alpha/isa/mem.isa => src/arch/alpha/isa/mem.isa rename : arch/alpha/isa/opcdec.isa => src/arch/alpha/isa/opcdec.isa rename : arch/alpha/isa/pal.isa => src/arch/alpha/isa/pal.isa rename : arch/alpha/isa/unimp.isa => src/arch/alpha/isa/unimp.isa rename : arch/alpha/isa/unknown.isa => src/arch/alpha/isa/unknown.isa rename : arch/alpha/isa/util.isa => src/arch/alpha/isa/util.isa rename : arch/alpha/isa_traits.hh => src/arch/alpha/isa_traits.hh rename : arch/alpha/linux/aligned.hh => src/arch/alpha/linux/aligned.hh rename : arch/alpha/linux/hwrpb.hh => src/arch/alpha/linux/hwrpb.hh rename : arch/alpha/linux/linux.cc => src/arch/alpha/linux/linux.cc rename : arch/alpha/linux/linux.hh => src/arch/alpha/linux/linux.hh rename : arch/alpha/linux/process.cc => src/arch/alpha/linux/process.cc rename : arch/alpha/linux/process.hh => src/arch/alpha/linux/process.hh rename : arch/alpha/linux/system.cc => src/arch/alpha/linux/system.cc rename : arch/alpha/linux/system.hh => src/arch/alpha/linux/system.hh rename : arch/alpha/linux/thread_info.hh => src/arch/alpha/linux/thread_info.hh rename : arch/alpha/linux/threadinfo.hh => src/arch/alpha/linux/threadinfo.hh rename : arch/alpha/osfpal.cc => src/arch/alpha/osfpal.cc rename : arch/alpha/osfpal.hh => src/arch/alpha/osfpal.hh rename : arch/alpha/process.cc => src/arch/alpha/process.cc rename : arch/alpha/process.hh => src/arch/alpha/process.hh rename : arch/alpha/regfile.hh => src/arch/alpha/regfile.hh rename : arch/alpha/stacktrace.cc => src/arch/alpha/stacktrace.cc rename : arch/alpha/stacktrace.hh => src/arch/alpha/stacktrace.hh rename : arch/alpha/system.cc => src/arch/alpha/system.cc rename : arch/alpha/system.hh => src/arch/alpha/system.hh rename : arch/alpha/tlb.cc => src/arch/alpha/tlb.cc rename : arch/alpha/tlb.hh => src/arch/alpha/tlb.hh rename : arch/alpha/tru64/process.cc => src/arch/alpha/tru64/process.cc rename : arch/alpha/tru64/process.hh => src/arch/alpha/tru64/process.hh rename : arch/alpha/tru64/system.cc => src/arch/alpha/tru64/system.cc rename : arch/alpha/tru64/system.hh => src/arch/alpha/tru64/system.hh rename : arch/alpha/tru64/tru64.cc => src/arch/alpha/tru64/tru64.cc rename : arch/alpha/tru64/tru64.hh => src/arch/alpha/tru64/tru64.hh rename : arch/alpha/types.hh => src/arch/alpha/types.hh rename : arch/alpha/utility.hh => src/arch/alpha/utility.hh rename : arch/alpha/vtophys.cc => src/arch/alpha/vtophys.cc rename : arch/alpha/vtophys.hh => src/arch/alpha/vtophys.hh rename : arch/isa_parser.py => src/arch/isa_parser.py rename : arch/isa_specific.hh => src/arch/isa_specific.hh rename : arch/mips/SConscript => src/arch/mips/SConscript rename : arch/mips/faults.cc => src/arch/mips/faults.cc rename : arch/mips/faults.hh => src/arch/mips/faults.hh rename : arch/mips/isa/base.isa => src/arch/mips/isa/base.isa rename : arch/mips/isa/bitfields.isa => src/arch/mips/isa/bitfields.isa rename : arch/mips/isa/decoder.isa => src/arch/mips/isa/decoder.isa rename : arch/mips/isa/formats/basic.isa => src/arch/mips/isa/formats/basic.isa rename : arch/mips/isa/formats/branch.isa => src/arch/mips/isa/formats/branch.isa rename : arch/mips/isa/formats/formats.isa => src/arch/mips/isa/formats/formats.isa rename : arch/mips/isa/formats/fp.isa => src/arch/mips/isa/formats/fp.isa rename : arch/mips/isa/formats/int.isa => src/arch/mips/isa/formats/int.isa rename : arch/mips/isa/formats/mem.isa => src/arch/mips/isa/formats/mem.isa rename : arch/mips/isa/formats/noop.isa => src/arch/mips/isa/formats/noop.isa rename : arch/mips/isa/formats/tlbop.isa => src/arch/mips/isa/formats/tlbop.isa rename : arch/mips/isa/formats/trap.isa => src/arch/mips/isa/formats/trap.isa rename : arch/mips/isa/formats/unimp.isa => src/arch/mips/isa/formats/unimp.isa rename : arch/mips/isa/formats/unknown.isa => src/arch/mips/isa/formats/unknown.isa rename : arch/mips/isa/formats/util.isa => src/arch/mips/isa/formats/util.isa rename : arch/mips/isa/includes.isa => src/arch/mips/isa/includes.isa rename : arch/mips/isa/main.isa => src/arch/mips/isa/main.isa rename : arch/mips/isa/operands.isa => src/arch/mips/isa/operands.isa rename : arch/mips/isa_traits.cc => src/arch/mips/isa_traits.cc rename : arch/mips/isa_traits.hh => src/arch/mips/isa_traits.hh rename : arch/mips/linux/linux.cc => src/arch/mips/linux/linux.cc rename : arch/mips/linux/linux.hh => src/arch/mips/linux/linux.hh rename : arch/mips/linux/process.cc => src/arch/mips/linux/process.cc rename : arch/mips/linux/process.hh => src/arch/mips/linux/process.hh rename : arch/mips/process.cc => src/arch/mips/process.cc rename : arch/mips/process.hh => src/arch/mips/process.hh rename : arch/mips/regfile/float_regfile.hh => src/arch/mips/regfile/float_regfile.hh rename : arch/mips/regfile/int_regfile.hh => src/arch/mips/regfile/int_regfile.hh rename : arch/mips/regfile/misc_regfile.hh => src/arch/mips/regfile/misc_regfile.hh rename : arch/mips/regfile/regfile.hh => src/arch/mips/regfile/regfile.hh rename : arch/mips/stacktrace.hh => src/arch/mips/stacktrace.hh rename : arch/mips/types.hh => src/arch/mips/types.hh rename : arch/mips/utility.hh => src/arch/mips/utility.hh rename : arch/sparc/SConscript => src/arch/sparc/SConscript rename : arch/sparc/faults.cc => src/arch/sparc/faults.cc rename : arch/sparc/faults.hh => src/arch/sparc/faults.hh rename : arch/sparc/isa/base.isa => src/arch/sparc/isa/base.isa rename : arch/sparc/isa/bitfields.isa => src/arch/sparc/isa/bitfields.isa rename : arch/sparc/isa/decoder.isa => src/arch/sparc/isa/decoder.isa rename : arch/sparc/isa/formats.isa => src/arch/sparc/isa/formats.isa rename : arch/sparc/isa/formats/basic.isa => src/arch/sparc/isa/formats/basic.isa rename : arch/sparc/isa/formats/branch.isa => src/arch/sparc/isa/formats/branch.isa rename : arch/sparc/isa/formats/integerop.isa => src/arch/sparc/isa/formats/integerop.isa rename : arch/sparc/isa/formats/mem.isa => src/arch/sparc/isa/formats/mem.isa rename : arch/sparc/isa/formats/nop.isa => src/arch/sparc/isa/formats/nop.isa rename : arch/sparc/isa/formats/priv.isa => src/arch/sparc/isa/formats/priv.isa rename : arch/sparc/isa/formats/trap.isa => src/arch/sparc/isa/formats/trap.isa rename : arch/sparc/isa/formats/unknown.isa => src/arch/sparc/isa/formats/unknown.isa rename : arch/sparc/isa/includes.isa => src/arch/sparc/isa/includes.isa rename : arch/sparc/isa/main.isa => src/arch/sparc/isa/main.isa rename : arch/sparc/isa/operands.isa => src/arch/sparc/isa/operands.isa rename : arch/sparc/isa_traits.hh => src/arch/sparc/isa_traits.hh rename : arch/sparc/linux/linux.cc => src/arch/sparc/linux/linux.cc rename : arch/sparc/linux/linux.hh => src/arch/sparc/linux/linux.hh rename : arch/sparc/linux/process.cc => src/arch/sparc/linux/process.cc rename : arch/sparc/linux/process.hh => src/arch/sparc/linux/process.hh rename : arch/sparc/process.cc => src/arch/sparc/process.cc rename : arch/sparc/process.hh => src/arch/sparc/process.hh rename : arch/sparc/regfile.hh => src/arch/sparc/regfile.hh rename : arch/sparc/solaris/process.cc => src/arch/sparc/solaris/process.cc rename : arch/sparc/solaris/process.hh => src/arch/sparc/solaris/process.hh rename : arch/sparc/solaris/solaris.cc => src/arch/sparc/solaris/solaris.cc rename : arch/sparc/solaris/solaris.hh => src/arch/sparc/solaris/solaris.hh rename : arch/sparc/stacktrace.hh => src/arch/sparc/stacktrace.hh rename : arch/sparc/system.cc => src/arch/sparc/system.cc rename : arch/sparc/system.hh => src/arch/sparc/system.hh rename : arch/sparc/utility.hh => src/arch/sparc/utility.hh rename : base/bitfield.hh => src/base/bitfield.hh rename : base/callback.hh => src/base/callback.hh rename : base/chunk_generator.hh => src/base/chunk_generator.hh rename : base/circlebuf.cc => src/base/circlebuf.cc rename : base/circlebuf.hh => src/base/circlebuf.hh rename : base/compression/lzss_compression.cc => src/base/compression/lzss_compression.cc rename : base/compression/lzss_compression.hh => src/base/compression/lzss_compression.hh rename : base/compression/null_compression.hh => src/base/compression/null_compression.hh rename : base/cprintf.cc => src/base/cprintf.cc rename : base/cprintf.hh => src/base/cprintf.hh rename : base/cprintf_formats.hh => src/base/cprintf_formats.hh rename : base/crc.cc => src/base/crc.cc rename : base/crc.hh => src/base/crc.hh rename : base/date.cc => src/base/date.cc rename : base/dbl_list.hh => src/base/dbl_list.hh rename : base/endian.hh => src/base/endian.hh rename : base/fast_alloc.cc => src/base/fast_alloc.cc rename : base/fast_alloc.hh => src/base/fast_alloc.hh rename : base/fenv.hh => src/base/fenv.hh rename : base/fifo_buffer.cc => src/base/fifo_buffer.cc rename : base/fifo_buffer.hh => src/base/fifo_buffer.hh rename : base/hashmap.hh => src/base/hashmap.hh rename : base/hostinfo.cc => src/base/hostinfo.cc rename : base/hostinfo.hh => src/base/hostinfo.hh rename : base/hybrid_pred.cc => src/base/hybrid_pred.cc rename : base/hybrid_pred.hh => src/base/hybrid_pred.hh rename : base/inet.cc => src/base/inet.cc rename : base/inet.hh => src/base/inet.hh rename : base/inifile.cc => src/base/inifile.cc rename : base/inifile.hh => src/base/inifile.hh rename : base/intmath.cc => src/base/intmath.cc rename : base/intmath.hh => src/base/intmath.hh rename : base/kgdb.h => src/base/kgdb.h rename : base/loader/aout_object.cc => src/base/loader/aout_object.cc rename : base/loader/aout_object.hh => src/base/loader/aout_object.hh rename : base/loader/coff_sym.h => src/base/loader/coff_sym.h rename : base/loader/coff_symconst.h => src/base/loader/coff_symconst.h rename : base/loader/ecoff_object.cc => src/base/loader/ecoff_object.cc rename : base/loader/ecoff_object.hh => src/base/loader/ecoff_object.hh rename : base/loader/elf_object.cc => src/base/loader/elf_object.cc rename : base/loader/elf_object.hh => src/base/loader/elf_object.hh rename : base/loader/exec_aout.h => src/base/loader/exec_aout.h rename : base/loader/exec_ecoff.h => src/base/loader/exec_ecoff.h rename : base/loader/object_file.cc => src/base/loader/object_file.cc rename : base/loader/object_file.hh => src/base/loader/object_file.hh rename : base/loader/symtab.cc => src/base/loader/symtab.cc rename : base/loader/symtab.hh => src/base/loader/symtab.hh rename : base/match.cc => src/base/match.cc rename : base/match.hh => src/base/match.hh rename : base/misc.cc => src/base/misc.cc rename : base/misc.hh => src/base/misc.hh rename : base/mod_num.hh => src/base/mod_num.hh rename : base/mysql.cc => src/base/mysql.cc rename : base/mysql.hh => src/base/mysql.hh rename : base/output.cc => src/base/output.cc rename : base/output.hh => src/base/output.hh rename : base/pollevent.cc => src/base/pollevent.cc rename : base/pollevent.hh => src/base/pollevent.hh rename : base/predictor.hh => src/base/predictor.hh rename : base/random.cc => src/base/random.cc rename : base/random.hh => src/base/random.hh rename : base/range.cc => src/base/range.cc rename : base/range.hh => src/base/range.hh rename : base/refcnt.hh => src/base/refcnt.hh rename : base/remote_gdb.cc => src/base/remote_gdb.cc rename : base/remote_gdb.hh => src/base/remote_gdb.hh rename : base/res_list.hh => src/base/res_list.hh rename : base/sat_counter.cc => src/base/sat_counter.cc rename : base/sat_counter.hh => src/base/sat_counter.hh rename : base/sched_list.hh => src/base/sched_list.hh rename : base/socket.cc => src/base/socket.cc rename : base/socket.hh => src/base/socket.hh rename : base/statistics.cc => src/base/statistics.cc rename : base/statistics.hh => src/base/statistics.hh rename : base/stats/events.cc => src/base/stats/events.cc rename : base/stats/events.hh => src/base/stats/events.hh rename : base/stats/flags.hh => src/base/stats/flags.hh rename : base/stats/mysql.cc => src/base/stats/mysql.cc rename : base/stats/mysql.hh => src/base/stats/mysql.hh rename : base/stats/mysql_run.hh => src/base/stats/mysql_run.hh rename : base/stats/output.hh => src/base/stats/output.hh rename : base/stats/statdb.cc => src/base/stats/statdb.cc rename : base/stats/statdb.hh => src/base/stats/statdb.hh rename : base/stats/text.cc => src/base/stats/text.cc rename : base/stats/text.hh => src/base/stats/text.hh rename : base/stats/types.hh => src/base/stats/types.hh rename : base/stats/visit.cc => src/base/stats/visit.cc rename : base/stats/visit.hh => src/base/stats/visit.hh rename : base/str.cc => src/base/str.cc rename : base/str.hh => src/base/str.hh rename : base/time.cc => src/base/time.cc rename : base/time.hh => src/base/time.hh rename : base/timebuf.hh => src/base/timebuf.hh rename : base/trace.cc => src/base/trace.cc rename : base/trace.hh => src/base/trace.hh rename : base/traceflags.py => src/base/traceflags.py rename : base/userinfo.cc => src/base/userinfo.cc rename : base/userinfo.hh => src/base/userinfo.hh rename : cpu/SConscript => src/cpu/SConscript rename : cpu/base.cc => src/cpu/base.cc rename : cpu/base.hh => src/cpu/base.hh rename : cpu/base_dyn_inst.cc => src/cpu/base_dyn_inst.cc rename : cpu/base_dyn_inst.hh => src/cpu/base_dyn_inst.hh rename : cpu/cpu_exec_context.cc => src/cpu/cpu_exec_context.cc rename : cpu/cpu_exec_context.hh => src/cpu/cpu_exec_context.hh rename : cpu/cpu_models.py => src/cpu/cpu_models.py rename : cpu/exec_context.hh => src/cpu/exec_context.hh rename : cpu/exetrace.cc => src/cpu/exetrace.cc rename : cpu/exetrace.hh => src/cpu/exetrace.hh rename : cpu/inst_seq.hh => src/cpu/inst_seq.hh rename : cpu/intr_control.cc => src/cpu/intr_control.cc rename : cpu/intr_control.hh => src/cpu/intr_control.hh rename : cpu/memtest/memtest.cc => src/cpu/memtest/memtest.cc rename : cpu/memtest/memtest.hh => src/cpu/memtest/memtest.hh rename : cpu/o3/2bit_local_pred.cc => src/cpu/o3/2bit_local_pred.cc rename : cpu/o3/2bit_local_pred.hh => src/cpu/o3/2bit_local_pred.hh rename : cpu/o3/alpha_cpu.cc => src/cpu/o3/alpha_cpu.cc rename : cpu/o3/alpha_cpu.hh => src/cpu/o3/alpha_cpu.hh rename : cpu/o3/alpha_cpu_builder.cc => src/cpu/o3/alpha_cpu_builder.cc rename : cpu/o3/alpha_cpu_impl.hh => src/cpu/o3/alpha_cpu_impl.hh rename : cpu/o3/alpha_dyn_inst.cc => src/cpu/o3/alpha_dyn_inst.cc rename : cpu/o3/alpha_dyn_inst.hh => src/cpu/o3/alpha_dyn_inst.hh rename : cpu/o3/alpha_dyn_inst_impl.hh => src/cpu/o3/alpha_dyn_inst_impl.hh rename : cpu/o3/alpha_impl.hh => src/cpu/o3/alpha_impl.hh rename : cpu/o3/alpha_params.hh => src/cpu/o3/alpha_params.hh rename : cpu/o3/bpred_unit.cc => src/cpu/o3/bpred_unit.cc rename : cpu/o3/bpred_unit.hh => src/cpu/o3/bpred_unit.hh rename : cpu/o3/bpred_unit_impl.hh => src/cpu/o3/bpred_unit_impl.hh rename : cpu/o3/btb.cc => src/cpu/o3/btb.cc rename : cpu/o3/btb.hh => src/cpu/o3/btb.hh rename : cpu/o3/comm.hh => src/cpu/o3/comm.hh rename : cpu/o3/commit.cc => src/cpu/o3/commit.cc rename : cpu/o3/commit.hh => src/cpu/o3/commit.hh rename : cpu/o3/commit_impl.hh => src/cpu/o3/commit_impl.hh rename : cpu/o3/cpu.cc => src/cpu/o3/cpu.cc rename : cpu/o3/cpu.hh => src/cpu/o3/cpu.hh rename : cpu/o3/cpu_policy.hh => src/cpu/o3/cpu_policy.hh rename : cpu/o3/decode.cc => src/cpu/o3/decode.cc rename : cpu/o3/decode.hh => src/cpu/o3/decode.hh rename : cpu/o3/decode_impl.hh => src/cpu/o3/decode_impl.hh rename : cpu/o3/fetch.cc => src/cpu/o3/fetch.cc rename : cpu/o3/fetch.hh => src/cpu/o3/fetch.hh rename : cpu/o3/fetch_impl.hh => src/cpu/o3/fetch_impl.hh rename : cpu/o3/free_list.cc => src/cpu/o3/free_list.cc rename : cpu/o3/free_list.hh => src/cpu/o3/free_list.hh rename : cpu/o3/iew.cc => src/cpu/o3/iew.cc rename : cpu/o3/iew.hh => src/cpu/o3/iew.hh rename : cpu/o3/iew_impl.hh => src/cpu/o3/iew_impl.hh rename : cpu/o3/inst_queue.cc => src/cpu/o3/inst_queue.cc rename : cpu/o3/inst_queue.hh => src/cpu/o3/inst_queue.hh rename : cpu/o3/inst_queue_impl.hh => src/cpu/o3/inst_queue_impl.hh rename : cpu/o3/mem_dep_unit.cc => src/cpu/o3/mem_dep_unit.cc rename : cpu/o3/mem_dep_unit.hh => src/cpu/o3/mem_dep_unit.hh rename : cpu/o3/mem_dep_unit_impl.hh => src/cpu/o3/mem_dep_unit_impl.hh rename : cpu/o3/ras.cc => src/cpu/o3/ras.cc rename : cpu/o3/ras.hh => src/cpu/o3/ras.hh rename : cpu/o3/regfile.hh => src/cpu/o3/regfile.hh rename : cpu/o3/rename.cc => src/cpu/o3/rename.cc rename : cpu/o3/rename.hh => src/cpu/o3/rename.hh rename : cpu/o3/rename_impl.hh => src/cpu/o3/rename_impl.hh rename : cpu/o3/rename_map.cc => src/cpu/o3/rename_map.cc rename : cpu/o3/rename_map.hh => src/cpu/o3/rename_map.hh rename : cpu/o3/rob.cc => src/cpu/o3/rob.cc rename : cpu/o3/rob.hh => src/cpu/o3/rob.hh rename : cpu/o3/rob_impl.hh => src/cpu/o3/rob_impl.hh rename : cpu/o3/sat_counter.cc => src/cpu/o3/sat_counter.cc rename : cpu/o3/sat_counter.hh => src/cpu/o3/sat_counter.hh rename : cpu/o3/store_set.cc => src/cpu/o3/store_set.cc rename : cpu/o3/store_set.hh => src/cpu/o3/store_set.hh rename : cpu/o3/tournament_pred.cc => src/cpu/o3/tournament_pred.cc rename : cpu/o3/tournament_pred.hh => src/cpu/o3/tournament_pred.hh rename : cpu/op_class.cc => src/cpu/op_class.cc rename : cpu/op_class.hh => src/cpu/op_class.hh rename : cpu/ozone/cpu.cc => src/cpu/ozone/cpu.cc rename : cpu/ozone/cpu.hh => src/cpu/ozone/cpu.hh rename : cpu/ozone/cpu_impl.hh => src/cpu/ozone/cpu_impl.hh rename : cpu/ozone/ea_list.cc => src/cpu/ozone/ea_list.cc rename : cpu/ozone/ea_list.hh => src/cpu/ozone/ea_list.hh rename : cpu/pc_event.cc => src/cpu/pc_event.cc rename : cpu/pc_event.hh => src/cpu/pc_event.hh rename : cpu/profile.cc => src/cpu/profile.cc rename : cpu/profile.hh => src/cpu/profile.hh rename : cpu/simple/atomic.cc => src/cpu/simple/atomic.cc rename : cpu/simple/atomic.hh => src/cpu/simple/atomic.hh rename : cpu/simple/base.cc => src/cpu/simple/base.cc rename : cpu/simple/base.hh => src/cpu/simple/base.hh rename : cpu/simple/timing.cc => src/cpu/simple/timing.cc rename : cpu/simple/timing.hh => src/cpu/simple/timing.hh rename : cpu/smt.hh => src/cpu/smt.hh rename : cpu/static_inst.cc => src/cpu/static_inst.cc rename : cpu/static_inst.hh => src/cpu/static_inst.hh rename : cpu/trace/opt_cpu.cc => src/cpu/trace/opt_cpu.cc rename : cpu/trace/opt_cpu.hh => src/cpu/trace/opt_cpu.hh rename : cpu/trace/reader/ibm_reader.cc => src/cpu/trace/reader/ibm_reader.cc rename : cpu/trace/reader/ibm_reader.hh => src/cpu/trace/reader/ibm_reader.hh rename : cpu/trace/reader/itx_reader.cc => src/cpu/trace/reader/itx_reader.cc rename : cpu/trace/reader/itx_reader.hh => src/cpu/trace/reader/itx_reader.hh rename : cpu/trace/reader/m5_reader.cc => src/cpu/trace/reader/m5_reader.cc rename : cpu/trace/reader/m5_reader.hh => src/cpu/trace/reader/m5_reader.hh rename : cpu/trace/reader/mem_trace_reader.cc => src/cpu/trace/reader/mem_trace_reader.cc rename : cpu/trace/reader/mem_trace_reader.hh => src/cpu/trace/reader/mem_trace_reader.hh rename : cpu/trace/trace_cpu.cc => src/cpu/trace/trace_cpu.cc rename : cpu/trace/trace_cpu.hh => src/cpu/trace/trace_cpu.hh rename : dev/alpha_access.h => src/dev/alpha_access.h rename : dev/alpha_console.cc => src/dev/alpha_console.cc rename : dev/alpha_console.hh => src/dev/alpha_console.hh rename : dev/baddev.cc => src/dev/baddev.cc rename : dev/baddev.hh => src/dev/baddev.hh rename : dev/disk_image.cc => src/dev/disk_image.cc rename : dev/disk_image.hh => src/dev/disk_image.hh rename : dev/etherbus.cc => src/dev/etherbus.cc rename : dev/etherbus.hh => src/dev/etherbus.hh rename : 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=> src/dev/tsunami.cc rename : dev/tsunami.hh => src/dev/tsunami.hh rename : dev/tsunami_cchip.cc => src/dev/tsunami_cchip.cc rename : dev/tsunami_cchip.hh => src/dev/tsunami_cchip.hh rename : dev/tsunami_io.cc => src/dev/tsunami_io.cc rename : dev/tsunami_io.hh => src/dev/tsunami_io.hh rename : dev/tsunami_pchip.cc => src/dev/tsunami_pchip.cc rename : dev/tsunami_pchip.hh => src/dev/tsunami_pchip.hh rename : dev/tsunamireg.h => src/dev/tsunamireg.h rename : dev/uart.cc => src/dev/uart.cc rename : dev/uart.hh => src/dev/uart.hh rename : dev/uart8250.cc => src/dev/uart8250.cc rename : dev/uart8250.hh => src/dev/uart8250.hh rename : kern/kernel_stats.cc => src/kern/kernel_stats.cc rename : kern/kernel_stats.hh => src/kern/kernel_stats.hh rename : kern/linux/events.cc => src/kern/linux/events.cc rename : kern/linux/events.hh => src/kern/linux/events.hh rename : kern/linux/linux.hh => src/kern/linux/linux.hh rename : kern/linux/linux_syscalls.cc => src/kern/linux/linux_syscalls.cc rename : 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mem/translating_port.hh => src/mem/translating_port.hh rename : mem/vport.cc => src/mem/vport.cc rename : mem/vport.hh => src/mem/vport.hh rename : python/SConscript => src/python/SConscript rename : python/m5/__init__.py => src/python/m5/__init__.py rename : python/m5/config.py => src/python/m5/config.py rename : python/m5/convert.py => src/python/m5/convert.py rename : python/m5/multidict.py => src/python/m5/multidict.py rename : python/m5/objects/AlphaConsole.py => src/python/m5/objects/AlphaConsole.py rename : python/m5/objects/AlphaFullCPU.py => src/python/m5/objects/AlphaFullCPU.py rename : python/m5/objects/AlphaTLB.py => src/python/m5/objects/AlphaTLB.py rename : python/m5/objects/BadDevice.py => src/python/m5/objects/BadDevice.py rename : python/m5/objects/BaseCPU.py => src/python/m5/objects/BaseCPU.py rename : python/m5/objects/BaseCache.py => src/python/m5/objects/BaseCache.py rename : python/m5/objects/Bridge.py => src/python/m5/objects/Bridge.py rename : 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sim/stats.hh => src/sim/stats.hh rename : sim/syscall_emul.cc => src/sim/syscall_emul.cc rename : sim/syscall_emul.hh => src/sim/syscall_emul.hh rename : sim/system.cc => src/sim/system.cc rename : sim/system.hh => src/sim/system.hh rename : sim/vptr.hh => src/sim/vptr.hh rename : test/Makefile => src/unittest/Makefile rename : test/bitvectest.cc => src/unittest/bitvectest.cc rename : test/circletest.cc => src/unittest/circletest.cc rename : test/cprintftest.cc => src/unittest/cprintftest.cc rename : test/foo.ini => src/unittest/foo.ini rename : test/genini.py => src/unittest/genini.py rename : test/initest.cc => src/unittest/initest.cc rename : test/initest.ini => src/unittest/initest.ini rename : test/lru_test.cc => src/unittest/lru_test.cc rename : test/nmtest.cc => src/unittest/nmtest.cc rename : test/offtest.cc => src/unittest/offtest.cc rename : test/paramtest.cc => src/unittest/paramtest.cc rename : test/rangetest.cc => src/unittest/rangetest.cc rename : test/sized_test.cc => src/unittest/sized_test.cc rename : test/stattest.cc => src/unittest/stattest.cc rename : test/strnumtest.cc => src/unittest/strnumtest.cc rename : test/symtest.cc => src/unittest/symtest.cc rename : test/tokentest.cc => src/unittest/tokentest.cc rename : test/tracetest.cc => src/unittest/tracetest.cc extra : convert_revision : cab6a5271ca1b368193cd948e5d3dcc47ab1bd48
2005-11-21Actually, you should'nt do math on Clock in the config files.Nathan Binkert
python/m5/config.py: Clock should not be a NumericParamValue since math on it can be ambiguous. (As the comment clearly says.) --HG-- extra : convert_revision : 74f8ec846c6a980d92e0bf4bf1c7fac73a75b923
2005-11-21BARs now of type MemorySize32Nathan Binkert
python/m5/config.py: Add MemorySize32 (a 32-bit value specified in bytes) --HG-- extra : convert_revision : bfeee501f7ff1aa2567a3682da129a5770cb7bd2
2005-11-20Make it so one can do math with a Clock type in the config filesNathan Binkert
python/m5/config.py: Make Clock a NumericParamValue so you can do math with it --HG-- extra : convert_revision : 7fa548d1a23c604a31d3ecae3853949b064a1830
2005-11-20Allow long as a multiplier in the python configNathan Binkert
python/m5/config.py: Allow long as a multiplier --HG-- extra : convert_revision : bdc45e9afc27bb7b0f2cd6aacf92758601b95ff8
2005-11-02allow conversion floats -> long so that 100e9 and such work as TicksAli Saidi
--HG-- extra : convert_revision : 23511baca6153bb3aa9c57be8818ad1b65f02a71
2005-11-02__init__ should not return anythingNathan Binkert
--HG-- extra : convert_revision : fb46eee741f4899d76bcf927523fa151d002decf
2005-11-02Make vector params interact with proxies properly.Steve Reinhardt
--HG-- extra : convert_revision : a4067f07d71d2adc1ccbf4512a43ceee7b5cc3de
2005-11-01Allow math on CheckedInt-derived ParamValue classes w/oSteve Reinhardt
losing type information. python/m5/config.py: Allow math on CheckedInt-derived ParamValue classes w/o losing type information. - Make CheckedInt derive from NumericParamValue, and *not* multiply inherit from long - Move CheckedInt bounds check to _check() hook so we can call it when value is updated (not just in constructor) python/m5/convert.py: - make toInteger() return a long, making toLong() unnecessary - toMemorySize should return long rather than float --HG-- extra : convert_revision : c1cf5e15b9ff35d9b573dd545e076fe68afef989
2005-08-15Fix NextEthernetAddrNathan Binkert
python/m5/config.py: NextEthernetAddr shouldnt' be a Singleton since we want __init__ to be called more than once. Make the EthernetAddr class a "proxy" so that unproxy will be called and NextEthernetAddr will generally work correctly. --HG-- extra : convert_revision : c89bf268e805e202ae71030fcea4833867c7e477
2005-07-18Fix for passing functional memory param to timing mem.Steve Reinhardt
python/m5/config.py: Fix error message. --HG-- extra : convert_revision : 4e57f7bdd4ea7dfdd3e88c60080f993997b0bda2
2005-06-23Added Float classAli Saidi
Fixed printing so the tokenizer in m5 doesn't get confused Expanded NullSimObject so it could be used as an element in a VectorParam --HG-- extra : convert_revision : 661b1916967d663ab7aee891f15f7ca190deeba6
2005-06-03Bug fix & cleanup in config code.Steve Reinhardt
python/m5/config.py: Bug fix: code was silently converting between incompatible SimObject types as an unintended side-effect of the object cloning support. --HG-- extra : convert_revision : 236f4fe5370f2eddf8af8fab68e2b83dccc34305
2005-06-02Fix-up some config issuesNathan Binkert
python/m5/config.py: Make NetworkBandwidth and MemoryBandwidth work python/m5/objects/Ethernet.py: Make 1Gbps default for ethernet --HG-- extra : convert_revision : 59e62f7e62624356ae8d7304598617f60667f040
2005-06-01Standardize clock parameter names to 'clock'.Steve Reinhardt
Fix description for Bus clock_ratio (no longer a ratio). Add Clock param type (generic Frequency or Latency). cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/beta_cpu/alpha_full_cpu_builder.cc: cpu/simple_cpu/simple_cpu.cc: dev/ide_ctrl.cc: dev/ns_gige.cc: dev/ns_gige.hh: dev/pciconfigall.cc: dev/sinic.cc: dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_pchip.cc: dev/uart.cc: python/m5/objects/BaseCPU.py: python/m5/objects/BaseCache.py: python/m5/objects/BaseSystem.py: python/m5/objects/Bus.py: python/m5/objects/Ethernet.py: python/m5/objects/Root.py: sim/universe.cc: Standardize clock parameter names to 'clock'. Fix description for Bus clock_ratio (no longer a ratio). python/m5/config.py: Minor tweaks on Frequency/Latency: - added new Clock param type to avoid ambiguities - factored out init code into getLatency() - made RootFrequency *not* a subclass of Frequency so it can't be directly assigned to a Frequency paremeter --HG-- extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
2005-06-01A few more config updates. Works with regression now.Steve Reinhardt
configs/splash2/run.py: Update file for new config changes. python/m5/config.py: - isParamContext() not defined any more - fix bug with re-assigning vectors over scalars and vice versa --HG-- rename : configs/splash2/run.mpy => configs/splash2/run.py extra : convert_revision : 2eb28a92f8de327f6dfddd01467c61e759275f6b
2005-05-29Major cleanup of python config code.Steve Reinhardt
Special mpy importer is gone; everything is just plain Python now (funky, but straight-up). May not completely work yet... generates identical ini files for many configs/kernel settings, but I have yet to run it against regressions. This commit is for my own convenience and won't be pushed until more testing is done. python/m5/__init__.py: Get rid of mpy_importer and param_types. python/m5/config.py: Major cleanup. We now have separate classes and instances for SimObjects. Proxy handling and param conversion significantly reorganized. No explicit instantiation step anymore; we can dump an ini file straight from the original tree. Still needs more/better/truer comments. test/genini.py: Replace LoadMpyFile() with built-in execfile(). Export __main__.m5_build_env. python/m5/objects/AlphaConsole.py: python/m5/objects/AlphaFullCPU.py: python/m5/objects/AlphaTLB.py: python/m5/objects/BadDevice.py: python/m5/objects/BaseCPU.py: python/m5/objects/BaseCache.py: python/m5/objects/BaseSystem.py: python/m5/objects/Bus.py: python/m5/objects/CoherenceProtocol.py: python/m5/objects/Device.py: python/m5/objects/DiskImage.py: python/m5/objects/Ethernet.py: python/m5/objects/Ide.py: python/m5/objects/IntrControl.py: python/m5/objects/MemTest.py: python/m5/objects/Pci.py: python/m5/objects/PhysicalMemory.py: python/m5/objects/Platform.py: python/m5/objects/Process.py: python/m5/objects/Repl.py: python/m5/objects/Root.py: python/m5/objects/SimConsole.py: python/m5/objects/SimpleDisk.py: python/m5/objects/Tsunami.py: python/m5/objects/Uart.py: Fixes for eliminating mpy_importer, and modified handling of frequency/latency params. Also renamed parent to Parent. --HG-- rename : python/m5/objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.py rename : python/m5/objects/AlphaFullCPU.mpy => python/m5/objects/AlphaFullCPU.py rename : python/m5/objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.py rename : python/m5/objects/BadDevice.mpy => python/m5/objects/BadDevice.py rename : python/m5/objects/BaseCPU.mpy => python/m5/objects/BaseCPU.py rename : python/m5/objects/BaseCache.mpy => python/m5/objects/BaseCache.py rename : python/m5/objects/BaseSystem.mpy => python/m5/objects/BaseSystem.py rename : python/m5/objects/Bus.mpy => python/m5/objects/Bus.py rename : python/m5/objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.py rename : python/m5/objects/Device.mpy => python/m5/objects/Device.py rename : python/m5/objects/DiskImage.mpy => python/m5/objects/DiskImage.py rename : python/m5/objects/Ethernet.mpy => python/m5/objects/Ethernet.py rename : python/m5/objects/Ide.mpy => python/m5/objects/Ide.py rename : python/m5/objects/IntrControl.mpy => python/m5/objects/IntrControl.py rename : python/m5/objects/MemTest.mpy => python/m5/objects/MemTest.py rename : python/m5/objects/Pci.mpy => python/m5/objects/Pci.py rename : python/m5/objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.py rename : python/m5/objects/Platform.mpy => python/m5/objects/Platform.py rename : python/m5/objects/Process.mpy => python/m5/objects/Process.py rename : python/m5/objects/Repl.mpy => python/m5/objects/Repl.py rename : python/m5/objects/Root.mpy => python/m5/objects/Root.py rename : python/m5/objects/SimConsole.mpy => python/m5/objects/SimConsole.py rename : python/m5/objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.py rename : python/m5/objects/Tsunami.mpy => python/m5/objects/Tsunami.py rename : python/m5/objects/Uart.mpy => python/m5/objects/Uart.py extra : convert_revision : 9dc55103a6f5b40eada4ed181a71a96fae6b0b76
2005-04-17Mostly hacks for multiplying Frequency-type proxies by constantsSteve Reinhardt
(plus some small fixes). python/m5/config.py: Hacks to allow multiplication on Frequency/Latency-valued proxies. Provide __rmul__ as well as __mul__ on Proxy objects. test/genini.py: Default value for -EFOO should be True not 1 (since 1 is no longer convertable to Bool). --HG-- extra : convert_revision : f8a221fcd9e095fdd7b7db4be0ed0cdcd20074be
2005-04-11Make the notion of a global event tick independent of the actualNathan Binkert
CPU cycle ticks. This allows the user to have CPUs of different frequencies, and also allows frequencies and latencies that are not evenly divisible by the CPU frequency. For now, the CPU frequency is still set to the global frequency, but soon, we'll hopefully make the global frequency fixed at something like 1THz and set all other frequencies independently. arch/alpha/ev5.cc: The cycles counter is based on the current cpu cycle. cpu/base_cpu.cc: frequency isn't the cpu parameter anymore, cycleTime is. cpu/base_cpu.hh: frequency isn't the cpu parameter anymore, cycleTime is. create several public functions for getting the cpu frequency and the numbers of ticks for a given number of cycles, etc. cpu/memtest/memtest.cc: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/trace/trace_cpu.cc: Now that ticks aren't cpu cycles, fixup code to advance by the proper number of ticks. cpu/memtest/memtest.hh: cpu/trace/trace_cpu.hh: Provide a function to get the number of ticks for a given number of cycles. dev/alpha_console.cc: Update for changes in the way that frequencies and latencies are accessed. Move some stuff to init() dev/alpha_console.hh: Need a pointer to the system and the cpu to get the frequency so we can pass the info to the console code. dev/etherbus.cc: dev/etherbus.hh: dev/etherlink.cc: dev/etherlink.hh: dev/ethertap.cc: dev/ide_disk.hh: dev/ns_gige.cc: dev/ns_gige.hh: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. dev/ide_disk.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. Add some extra debugging printfs dev/platform.cc: dev/sinic.cc: dev/sinic.hh: outline the constructor and destructor dev/platform.hh: outline the constructor and destructor. don't keep track of the interrupt frequency. Only provide the accessor function. dev/tsunami.cc: dev/tsunami.hh: outline the constructor and destructor Don't set the interrupt frequency here. Get it from the actual device that does the interrupting. dev/tsunami_io.cc: dev/tsunami_io.hh: Make the interrupt interval a configuration parameter. (And convert the interval to the new latency/frequency stuff in the python) kern/linux/linux_system.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. kern/tru64/tru64_system.cc: For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. python/m5/config.py: Fix support for cycle_time relative latencies and frequencies. Add support for getting a NetworkBandwidth or a MemoryBandwidth. python/m5/objects/BaseCPU.mpy: All CPUs now have a cycle_time. The default is the global frequency, but it is now possible to set the global frequency to some large value (like 1THz) and set each CPU frequency independently. python/m5/objects/BaseCache.mpy: python/m5/objects/Ide.mpy: Make this a Latency parameter python/m5/objects/BaseSystem.mpy: We need to pass the boot CPU's frequency to the system python/m5/objects/Ethernet.mpy: Update parameter types to use latency and bandwidth types python/m5/objects/Platform.mpy: this frequency isn't needed. We get it from the clock interrupt. python/m5/objects/Tsunami.mpy: The clock generator should hold the frequency sim/eventq.hh: Need to remove this assertion because the writeback event queue is different from the CPU's event queue which can cause this assertion to fail. sim/process.cc: Fix comment. sim/system.hh: Struct member to hold the boot CPU's frequency. sim/universe.cc: remove unneeded variable. --HG-- extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-06fix typo in python config stuffNathan Binkert
python/m5/config.py: fix typo --HG-- extra : convert_revision : 2208453d93149ba4af140dd78c29be4c4943b397
2005-04-06formattingNathan Binkert
--HG-- extra : convert_revision : 0b041556222c3892ee72e4d56c8acdda72bfc303
2005-04-06Add TcpPort and UdpPort as python typesNathan Binkert
python/m5/objects/SimConsole.mpy: the listener port is a TcpPort --HG-- extra : convert_revision : c26fdd93d3bc35d9f1563ac1087a7f75471c9020
2005-03-25Better handling of latency/frequency parameter typesNathan Binkert
python/m5/config.py: Addr is slightly different from memory size in that Addr will take non strings. Deal with the fact that the convert.toFoo functions only accept strings. Add RootFrequency as a special type for the Root.frequency parameter which is not scaled. Add ClockPeriod parameter type. python/m5/convert.py: Be more strict about what's allowed. Only accept strings as inputs for these conversion functions. If the user wants to accept something else, they need to deal with the failure and convert other types on their own. python/m5/objects/Bus.mpy: Use the new ClockPeriod parameter type python/m5/objects/Root.mpy: Can't use integers for frequency anymore python/m5/smartdict.py: rename SmartDict.Proxy to just Variable. Create a new class UndefinedVariable that is returned when the user tries to get a variable that is not in the dict. Undefined variable evaluates to false, and will cause an error elsewhere. --HG-- extra : convert_revision : 1d55246fd1af65106f102396234827d6401ef9ce
2005-03-25Better exceptions in python configNathan Binkert
python/m5/config.py: Don't raise a new exception, just modify and re-raise the old one. --HG-- extra : convert_revision : 47f6da3a8cb2ee18a6b400863e7ea80ab0c9a5ea
2005-03-24Add Frequency and Latency as new parameter types and use themNathan Binkert
where we can python/m5/config.py: Add two new parameter types: Frequency and Latency. These will soon be an integral part of the tick is picosecond thing. If the value can be converted directly to an integer without any special tricks, we assume that the number is the exact value desired. Otherwise, we convert the number assuming that it is in Hz or s. python/m5/objects/Bus.mpy: Use the new Latency and Frequency types where we can --HG-- extra : convert_revision : b3cff6020db83fb819507c348451c98697d1cf27
2005-03-23Formatting fixesNathan Binkert
--HG-- extra : convert_revision : 9a726945b7a1decbecf460df6714257b88742dc8
2005-03-23First step in fixing up parameter handling. Clean up theNathan Binkert
way ranges work, more fully support metric prefixes for all integer types, and convert memory sized parameters to the MemorySize type. python/m5/config.py: - no more _Param and _ParamProxy stuff. Use the names ParamBase and ParamFactory to hopefully make it clearer what we intend. - Get rid of RangeSize and the old Range class and more fully flesh out the Range class to deal with types of parameters and different kinds of ranges. - Call toInteger on the CheckedInt types so we can use metric prefixes in strings for all integers. - Get rid of the K, M, and G constants. Use the proper type or call one of the functions in the convert package. python/m5/convert.py: Simple way to deal with both floating point and integer strings. python/m5/objects/BaseCache.mpy: python/m5/objects/Ethernet.mpy: This is a MemorySize typed parameter --HG-- extra : convert_revision : 92b4ea662d723abdd6c0a49065b79c25400fac9b
2005-03-22Fix a bug introduced with the multidict commit.Nathan Binkert
python/m5/config.py: search for any base class that is a confignode instead of those that derive from param type so that non-type classes work too. (Those that are just derived from ConfigNode and not SimObject.) --HG-- extra : convert_revision : 422181b2e5efd4675ec34adcffecfb58eee0e4e7
2005-03-22clean up python exceptionsNathan Binkert
python/m5/config.py: clean up exception output a bit. --HG-- extra : convert_revision : a27e75276ffc9001f44c44595172cf2b455e5e23
2005-03-22Use the multidict in the python config stuff. Makes code a bitNathan Binkert
cleaner. python/m5/config.py: Use the multidict instead of the separately coded _getparam and _getvalue stuff. While we're at it, when we see a default parameter, we stick it into the dictionary right away. --HG-- extra : convert_revision : d6f6f5cc454a479e27718ec7952cd7559229ebe7
2005-03-22Sort the sim objects in the python outputNathan Binkert
python/m5/config.py: Turn back on the sorting of sim objects so we get consistent output. This can lead to slight changes in stats. --HG-- extra : convert_revision : 8ef9bd534cd2344acd69af7f52ee90b8b1afeb24
2005-03-19Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Steve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/m5-head --HG-- extra : convert_revision : a1cca61433e2cc9fd99d1a2361d32ea5c91b09c7
2005-03-18Byproducts of aborted attempt to refine 'parent' proxy semantics.Steve Reinhardt
Mostly cleanup of mpy_importer.mpy_parse(). python/m5/__init__.py: Move panic() up to top in case we want to use it in mpy_importer (though I ended up not doing that after all). python/m5/config.py: Add a couple of comments and a check for expressions like parent.any.foo (which is illegal). --HG-- extra : convert_revision : dfc99ac9b1a2d91a736ca0b773b6d3c528a4f3cc
2005-03-17Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/pact05Lisa Hsu
--HG-- extra : convert_revision : a0a10fccc03edcc5164536ea853788b982e332d7
2005-03-17allow the call to len on Value proxy.Lisa Hsu
--HG-- extra : convert_revision : 1a0aaf8db5ef60e0e7fc053bf4605eb90bb6e9e0
2005-03-16Merge zizzer.eecs.umich.edu:/z/stever/bk/m5-headSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/m5-py --HG-- extra : convert_revision : 39f30bd052c0f2b88524311d674bad7a0fae6358
2005-03-16Allow proxies to refer to proxies in config files.Steve Reinhardt
python/m5/config.py: Allow proxies to refer to other proxies and resolve by recurseivly calling unproxy(). Not sure this works completely (since I don't have any examples to test it on) but it doesn't seem to break any existing config scripts. --HG-- extra : convert_revision : d7fc272d0777d85f89104dfb5d1c5e4d8ddd6d6f
2005-03-16Make panic work in m5.configNathan Binkert
python/m5/config.py: get panic from the m5 package. --HG-- extra : convert_revision : 0965c13086f5eef7214298227c34cd9693534555
2005-03-16Enhancements to python config proxy class.Steve Reinhardt
python/m5/config.py: - Enhanced Proxy class now supports subscripting, e.g., parent.cpu[0] or even parent.cpu[0].icache. - Proxy also supports multiplication (e.g., parent.cycle * 3), though this feature has not been tested. - Subscript 0 works even on non-lists, so you can safely say cpu[0] and get the first cpu even if there's only one. - Changed name of proxy object from 'Super' to 'parent', and changed "wild card" notation from plain 'Super' to 'parent.any'. python/m5/objects/AlphaConsole.mpy: python/m5/objects/BaseCPU.mpy: python/m5/objects/BaseSystem.mpy: python/m5/objects/Device.mpy: python/m5/objects/Ethernet.mpy: python/m5/objects/Ide.mpy: python/m5/objects/IntrControl.mpy: python/m5/objects/Pci.mpy: python/m5/objects/PhysicalMemory.mpy: python/m5/objects/Platform.mpy: python/m5/objects/SimConsole.mpy: python/m5/objects/SimpleDisk.mpy: python/m5/objects/Tsunami.mpy: python/m5/objects/Uart.mpy: Change 'Super.foo' to 'parent.foo' (and 'Super' to 'parent.any'). --HG-- extra : convert_revision : f996d0a3366d5e3e60ae5973691148c3d7cd497d
2005-03-15get rid of issequence and just use the isinstance builtinNathan Binkert
--HG-- extra : convert_revision : eca99aa35ad5c5c1c86325f55cf693ff585c9826
2005-03-14- Add capability to auto-generate Param structs fromSteve Reinhardt
.mpy SimObject descriptions. Structs are defined in simobj/param/ObjectName.hh. - Move compile-time python params (from CPPDEFINES) to separate dict from run-time params (from os.environ). The former are needed to generate proper param structs. This also helps prevent users from messing things up by setting the wrong environment vars (which could have overridden compile-time settings in the old system). - Other misc cleanup of m5 python package. SConscript: Include simobj/SConscript build/SConstruct: Fix type in comment python/SConscript: Move CPPDEFINES dict-generating code to m5scons.flatten_defines python/m5/__init__.py: - Generate a build_env SmartDict here to hold compile-time params (passed in via __main__.m5_build_env). - Move panic and env here from config.py. python/m5/config.py: Move panic, env to top level (m5/__init__.py) python/m5/objects/BaseCPU.mpy: Use build_env instead of env for compile-time params python/m5/smartdict.py: Add some comments. sim/sim_object.hh: Include auto-generated Param struct. Not used yet, just here as proof of concept. test/genini.py: Put -E arguments in build_env as well as os.environ --HG-- extra : convert_revision : cf6f4a2565b230c495b33b18612d6030988adac5
2005-03-13Minor Python config bug fix.Steve Reinhardt
python/m5/config.py: Add 'panic' to __all__ (some of Nate's scripts use it). --HG-- extra : convert_revision : ae3e2398dffe3edd17ee0155f38bc757d3552df2
2005-03-13A few fixes after trying one of Nate's job scripts.Steve Reinhardt
python/m5/config.py: Add issequence to __all__ export list. Added some more comments too. --HG-- extra : convert_revision : 17cd9205e43fe276f71563fcb96ec3c5069fcc86
2005-03-13Clean up import situation... key things are:Steve Reinhardt
- global tracking of legitimate param types in separate dict keeps us from having to import objects in config.py, which gets rid of nasty circular dependence - use __all__ in config.py and restrict imports from mpy_importer to reduce m5 namespace pollution python/m5/__init__.py: Try to limit namespace pollution by only importing what's needed from mpy_importer. Explicitly set up legal parameter types rather than relying on eval(). python/m5/config.py: Use empty ParamType base class to distinguish types that are legitimate SimObject params. Explicitly add these to global param_types map. Rework CheckedInt and Range classes a little bit to fit in better with the model. No need to import objects here any longer. Add __all__ list to specify subset of names that get exported on 'from m5.config import *'. --HG-- extra : convert_revision : 01c6e82e0b175fc9b3df25dd0cc80ecd842680bc
2005-03-11move the conversion stuff that was in configs/kernel/Config.py intoNathan Binkert
the m5 package as convert.py add a smartdict class which stores strings and can intelligently interpret those string variables as several other types. make the env dict use the smartdict class python/m5/config.py: move a bunch of conversion functions into convert.py turn the env dict into a smartdict adapt the _CheckedInt stuff to deal with derived types python/m5/objects/BaseCPU.mpy: env is now a smartdict and can properly convert to bool --HG-- extra : convert_revision : 8abcd35a5ab14b82f280aea59020953869e33365
2005-03-11Make ConfigNodes as intermediate containers work again.Nathan Binkert
python/m5/config.py: move the type stuff into the Node constructor and only try to grab self.type if the realtype is a SimObject --HG-- extra : convert_revision : 00f6ece47e3812f67f9e1f062fe9c060bd6dd1cf
2005-03-11stick all python stuff into a top level python directory.Nathan Binkert
create an m5 package in python/m5 move the objects package into the m5 package move the m5config into the m5 package as config leave both importers outside of the package. SConscript: sim/main.cc: move sim/pyconfig/* -> python python/SConscript: m5config.py -> m5/config.py (now automatically embedded) objects -> python/m5/objects embed all python files in python/m5 python/m5/config.py: importer renamed mpy_importer move code to m5/__init__.py test/genini.py: deal with new python organization keep track of paths we want to add and add them after parameters are parsed. --HG-- rename : sim/pyconfig/SConscript => python/SConscript rename : sim/pyconfig/m5config.py => python/m5/config.py rename : objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.mpy rename : objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.mpy rename : objects/BadDevice.mpy => python/m5/objects/BadDevice.mpy rename : objects/BaseCPU.mpy => python/m5/objects/BaseCPU.mpy rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy rename : objects/BaseSystem.mpy => python/m5/objects/BaseSystem.mpy rename : objects/Bus.mpy => python/m5/objects/Bus.mpy rename : objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.mpy rename : objects/Device.mpy => python/m5/objects/Device.mpy rename : objects/DiskImage.mpy => python/m5/objects/DiskImage.mpy rename : objects/Ethernet.mpy => python/m5/objects/Ethernet.mpy rename : objects/Ide.mpy => python/m5/objects/Ide.mpy rename : objects/IntrControl.mpy => python/m5/objects/IntrControl.mpy rename : objects/MemTest.mpy => python/m5/objects/MemTest.mpy rename : objects/Pci.mpy => python/m5/objects/Pci.mpy rename : objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.mpy rename : objects/Platform.mpy => python/m5/objects/Platform.mpy rename : objects/Process.mpy => python/m5/objects/Process.mpy rename : objects/Repl.mpy => python/m5/objects/Repl.mpy rename : objects/Root.mpy => python/m5/objects/Root.mpy rename : objects/SimConsole.mpy => python/m5/objects/SimConsole.mpy rename : objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.mpy rename : objects/Tsunami.mpy => python/m5/objects/Tsunami.mpy rename : objects/Uart.mpy => python/m5/objects/Uart.mpy extra : convert_revision : aebf6ccda33028b1125974ca8b6aeab6f7570f30