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2005-06-02Fix-up some config issuesNathan Binkert
python/m5/config.py: Make NetworkBandwidth and MemoryBandwidth work python/m5/objects/Ethernet.py: Make 1Gbps default for ethernet --HG-- extra : convert_revision : 59e62f7e62624356ae8d7304598617f60667f040
2005-06-01Standardize clock parameter names to 'clock'.Steve Reinhardt
Fix description for Bus clock_ratio (no longer a ratio). Add Clock param type (generic Frequency or Latency). cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/beta_cpu/alpha_full_cpu_builder.cc: cpu/simple_cpu/simple_cpu.cc: dev/ide_ctrl.cc: dev/ns_gige.cc: dev/ns_gige.hh: dev/pciconfigall.cc: dev/sinic.cc: dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_pchip.cc: dev/uart.cc: python/m5/objects/BaseCPU.py: python/m5/objects/BaseCache.py: python/m5/objects/BaseSystem.py: python/m5/objects/Bus.py: python/m5/objects/Ethernet.py: python/m5/objects/Root.py: sim/universe.cc: Standardize clock parameter names to 'clock'. Fix description for Bus clock_ratio (no longer a ratio). python/m5/config.py: Minor tweaks on Frequency/Latency: - added new Clock param type to avoid ambiguities - factored out init code into getLatency() - made RootFrequency *not* a subclass of Frequency so it can't be directly assigned to a Frequency paremeter --HG-- extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
2005-06-01A few more config updates. Works with regression now.Steve Reinhardt
configs/splash2/run.py: Update file for new config changes. python/m5/config.py: - isParamContext() not defined any more - fix bug with re-assigning vectors over scalars and vice versa --HG-- rename : configs/splash2/run.mpy => configs/splash2/run.py extra : convert_revision : 2eb28a92f8de327f6dfddd01467c61e759275f6b
2005-05-29Major cleanup of python config code.Steve Reinhardt
Special mpy importer is gone; everything is just plain Python now (funky, but straight-up). May not completely work yet... generates identical ini files for many configs/kernel settings, but I have yet to run it against regressions. This commit is for my own convenience and won't be pushed until more testing is done. python/m5/__init__.py: Get rid of mpy_importer and param_types. python/m5/config.py: Major cleanup. We now have separate classes and instances for SimObjects. Proxy handling and param conversion significantly reorganized. No explicit instantiation step anymore; we can dump an ini file straight from the original tree. Still needs more/better/truer comments. test/genini.py: Replace LoadMpyFile() with built-in execfile(). Export __main__.m5_build_env. python/m5/objects/AlphaConsole.py: python/m5/objects/AlphaFullCPU.py: python/m5/objects/AlphaTLB.py: python/m5/objects/BadDevice.py: python/m5/objects/BaseCPU.py: python/m5/objects/BaseCache.py: python/m5/objects/BaseSystem.py: python/m5/objects/Bus.py: python/m5/objects/CoherenceProtocol.py: python/m5/objects/Device.py: python/m5/objects/DiskImage.py: python/m5/objects/Ethernet.py: python/m5/objects/Ide.py: python/m5/objects/IntrControl.py: python/m5/objects/MemTest.py: python/m5/objects/Pci.py: python/m5/objects/PhysicalMemory.py: python/m5/objects/Platform.py: python/m5/objects/Process.py: python/m5/objects/Repl.py: python/m5/objects/Root.py: python/m5/objects/SimConsole.py: python/m5/objects/SimpleDisk.py: python/m5/objects/Tsunami.py: python/m5/objects/Uart.py: Fixes for eliminating mpy_importer, and modified handling of frequency/latency params. Also renamed parent to Parent. --HG-- rename : python/m5/objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.py rename : python/m5/objects/AlphaFullCPU.mpy => python/m5/objects/AlphaFullCPU.py rename : python/m5/objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.py rename : python/m5/objects/BadDevice.mpy => python/m5/objects/BadDevice.py rename : python/m5/objects/BaseCPU.mpy => python/m5/objects/BaseCPU.py rename : python/m5/objects/BaseCache.mpy => python/m5/objects/BaseCache.py rename : python/m5/objects/BaseSystem.mpy => python/m5/objects/BaseSystem.py rename : python/m5/objects/Bus.mpy => python/m5/objects/Bus.py rename : python/m5/objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.py rename : python/m5/objects/Device.mpy => python/m5/objects/Device.py rename : python/m5/objects/DiskImage.mpy => python/m5/objects/DiskImage.py rename : python/m5/objects/Ethernet.mpy => python/m5/objects/Ethernet.py rename : python/m5/objects/Ide.mpy => python/m5/objects/Ide.py rename : python/m5/objects/IntrControl.mpy => python/m5/objects/IntrControl.py rename : python/m5/objects/MemTest.mpy => python/m5/objects/MemTest.py rename : python/m5/objects/Pci.mpy => python/m5/objects/Pci.py rename : python/m5/objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.py rename : python/m5/objects/Platform.mpy => python/m5/objects/Platform.py rename : python/m5/objects/Process.mpy => python/m5/objects/Process.py rename : python/m5/objects/Repl.mpy => python/m5/objects/Repl.py rename : python/m5/objects/Root.mpy => python/m5/objects/Root.py rename : python/m5/objects/SimConsole.mpy => python/m5/objects/SimConsole.py rename : python/m5/objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.py rename : python/m5/objects/Tsunami.mpy => python/m5/objects/Tsunami.py rename : python/m5/objects/Uart.mpy => python/m5/objects/Uart.py extra : convert_revision : 9dc55103a6f5b40eada4ed181a71a96fae6b0b76
2005-05-17Merge ktlim@zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/ktlim2/current/m5Kevin Lim
--HG-- extra : convert_revision : c403960153ed648e7da7251465ca9350ba10cd27
2005-05-13Add mem_trace parameter to BaseCache.Steve Reinhardt
python/m5/objects/BaseCache.mpy: Add mem_trace parameter. --HG-- extra : convert_revision : a0bab53fabd7426eee5ca9c845c02a6ac2e1722f
2005-05-04Merge ktlim@zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/ktlim2/current/m5Kevin Lim
--HG-- extra : convert_revision : b868e7920eaa3682c6123651f0c598673ebb7f22
2005-05-03Large update of several parts of my code. The most notable change is the ↵Kevin Lim
inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. SConscript: arch/isa_parser.py: cpu/base_dyn_inst.cc: Remove OOO CPU stuff. arch/alpha/faults.hh: Add fake memory fault. This will be removed eventually. arch/alpha/isa_desc: Change EA comp and Mem accessor to be const StaticInstPtrs. cpu/base_dyn_inst.hh: Update read/write calls to use load queue and store queue indices. cpu/beta_cpu/alpha_dyn_inst.hh: Change to const StaticInst in the register accessors. cpu/beta_cpu/alpha_dyn_inst_impl.hh: Update syscall code with thread numbers. cpu/beta_cpu/alpha_full_cpu.hh: Alter some of the full system code so it will compile without errors. cpu/beta_cpu/alpha_full_cpu_builder.cc: Created a DerivAlphaFullCPU class so I can instantiate different CPUs that have different template parameters. cpu/beta_cpu/alpha_full_cpu_impl.hh: Update some of the full system code so it compiles. cpu/beta_cpu/alpha_params.hh: cpu/beta_cpu/fetch_impl.hh: Remove asid. cpu/beta_cpu/comm.hh: Remove global history field. cpu/beta_cpu/commit.hh: Comment out rename map. cpu/beta_cpu/commit_impl.hh: Update some of the full system code so it compiles. Also change it so that it handles memory instructions properly. cpu/beta_cpu/cpu_policy.hh: Removed IQ from the IEW template parameter to make it more uniform. cpu/beta_cpu/decode.hh: Add debug function. cpu/beta_cpu/decode_impl.hh: Slight updates for decode in the case where it causes a squash. cpu/beta_cpu/fetch.hh: cpu/beta_cpu/rob.hh: Comment out unneccessary code. cpu/beta_cpu/full_cpu.cc: Changed some of the full system code so it compiles. Updated exec contexts and so forth to hopefully make multithreading easier. cpu/beta_cpu/full_cpu.hh: Updated some of the full system code to make it compile. cpu/beta_cpu/iew.cc: Removed IQ from template parameter to IEW. cpu/beta_cpu/iew.hh: Removed IQ from template parameter to IEW. Updated IEW to recognize the Load/Store queue. cpu/beta_cpu/iew_impl.hh: New handling of memory instructions through the Load/Store queue. cpu/beta_cpu/inst_queue.hh: Updated comment. cpu/beta_cpu/inst_queue_impl.hh: Slightly different handling of memory instructions due to Load/Store queue. cpu/beta_cpu/regfile.hh: Updated full system code so it compiles. cpu/beta_cpu/rob_impl.hh: Moved some code around; no major functional changes. cpu/ooo_cpu/ooo_cpu.hh: Slight updates to OOO CPU; still does not work. cpu/static_inst.hh: Remove OOO CPU stuff. Change ea comp and mem acc to return const StaticInst. kern/kernel_stats.hh: Extra forward declares added due to compile error. --HG-- extra : convert_revision : 594a7cdbe57f6c2bda7d08856fcd864604a6238e
2005-05-02Make sinic work with mpyNathan Binkert
dev/sinic.cc: dev/sinic.hh: Fix sinic parameters. (header_bus -> io_bus) python/m5/objects/Ethernet.mpy: Add simobj definitions for sinic. --HG-- extra : convert_revision : 77d5b80bd1f1708329b263fb48965d7f555cc9d1
2005-04-29Add suport for no allocation of cache block on a dma read passing through a ↵Ron Dreslinski
cache from the cpu-side interface --HG-- extra : convert_revision : 0a3b3741924ed39c1c8710d0963e4c8f3e73f81a
2005-04-24Add the m5 parameter to the ns83820 device model so that weNathan Binkert
can pass simulator specific options to the device driver. dev/ns_gige.cc: Add the m5 register and parameter to the ns83820 device model so that we can pass simulator specific options to the device driver. dev/ns_gige.hh: dev/ns_gige_reg.h: Add the m5 register to the ns83820 device model --HG-- extra : convert_revision : 84674887560fa3b607e725b8e5bc8272761fcf09
2005-04-17Mostly hacks for multiplying Frequency-type proxies by constantsSteve Reinhardt
(plus some small fixes). python/m5/config.py: Hacks to allow multiplication on Frequency/Latency-valued proxies. Provide __rmul__ as well as __mul__ on Proxy objects. test/genini.py: Default value for -EFOO should be True not 1 (since 1 is no longer convertable to Bool). --HG-- extra : convert_revision : f8a221fcd9e095fdd7b7db4be0ed0cdcd20074be
2005-04-11Make the notion of a global event tick independent of the actualNathan Binkert
CPU cycle ticks. This allows the user to have CPUs of different frequencies, and also allows frequencies and latencies that are not evenly divisible by the CPU frequency. For now, the CPU frequency is still set to the global frequency, but soon, we'll hopefully make the global frequency fixed at something like 1THz and set all other frequencies independently. arch/alpha/ev5.cc: The cycles counter is based on the current cpu cycle. cpu/base_cpu.cc: frequency isn't the cpu parameter anymore, cycleTime is. cpu/base_cpu.hh: frequency isn't the cpu parameter anymore, cycleTime is. create several public functions for getting the cpu frequency and the numbers of ticks for a given number of cycles, etc. cpu/memtest/memtest.cc: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/trace/trace_cpu.cc: Now that ticks aren't cpu cycles, fixup code to advance by the proper number of ticks. cpu/memtest/memtest.hh: cpu/trace/trace_cpu.hh: Provide a function to get the number of ticks for a given number of cycles. dev/alpha_console.cc: Update for changes in the way that frequencies and latencies are accessed. Move some stuff to init() dev/alpha_console.hh: Need a pointer to the system and the cpu to get the frequency so we can pass the info to the console code. dev/etherbus.cc: dev/etherbus.hh: dev/etherlink.cc: dev/etherlink.hh: dev/ethertap.cc: dev/ide_disk.hh: dev/ns_gige.cc: dev/ns_gige.hh: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. dev/ide_disk.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. Add some extra debugging printfs dev/platform.cc: dev/sinic.cc: dev/sinic.hh: outline the constructor and destructor dev/platform.hh: outline the constructor and destructor. don't keep track of the interrupt frequency. Only provide the accessor function. dev/tsunami.cc: dev/tsunami.hh: outline the constructor and destructor Don't set the interrupt frequency here. Get it from the actual device that does the interrupting. dev/tsunami_io.cc: dev/tsunami_io.hh: Make the interrupt interval a configuration parameter. (And convert the interval to the new latency/frequency stuff in the python) kern/linux/linux_system.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. kern/tru64/tru64_system.cc: For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. python/m5/config.py: Fix support for cycle_time relative latencies and frequencies. Add support for getting a NetworkBandwidth or a MemoryBandwidth. python/m5/objects/BaseCPU.mpy: All CPUs now have a cycle_time. The default is the global frequency, but it is now possible to set the global frequency to some large value (like 1THz) and set each CPU frequency independently. python/m5/objects/BaseCache.mpy: python/m5/objects/Ide.mpy: Make this a Latency parameter python/m5/objects/BaseSystem.mpy: We need to pass the boot CPU's frequency to the system python/m5/objects/Ethernet.mpy: Update parameter types to use latency and bandwidth types python/m5/objects/Platform.mpy: this frequency isn't needed. We get it from the clock interrupt. python/m5/objects/Tsunami.mpy: The clock generator should hold the frequency sim/eventq.hh: Need to remove this assertion because the writeback event queue is different from the CPU's event queue which can cause this assertion to fail. sim/process.cc: Fix comment. sim/system.hh: Struct member to hold the boot CPU's frequency. sim/universe.cc: remove unneeded variable. --HG-- extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-08Hand merged a this-> statement for gcc3.4Ron Dreslinski
--HG-- extra : convert_revision : 11daa94a0631da5e9c2e4262a448035491dd86e5
2005-04-08Add Parameter to only do prefetch calculations on data accesses not ↵Ron Dreslinski
instruction accesses --HG-- extra : convert_revision : 85c987561a962f21466f0c1bd0473300d341c398
2005-04-06fix typo in python config stuffNathan Binkert
python/m5/config.py: fix typo --HG-- extra : convert_revision : 2208453d93149ba4af140dd78c29be4c4943b397
2005-04-06Fix the python NetworkBandwidth conversion functionNathan Binkert
python/m5/convert.py: Fix the NetworkBandwidth conversion function --HG-- extra : convert_revision : 93d9856fe6b59827c116e15835d2ef51292bd6c4
2005-04-06formattingNathan Binkert
--HG-- extra : convert_revision : 0b041556222c3892ee72e4d56c8acdda72bfc303
2005-04-06Add TcpPort and UdpPort as python typesNathan Binkert
python/m5/objects/SimConsole.mpy: the listener port is a TcpPort --HG-- extra : convert_revision : c26fdd93d3bc35d9f1563ac1087a7f75471c9020
2005-04-06full_system isn't a useful parameter anymore, get rid of it.Nathan Binkert
python/m5/objects/Root.mpy: sim/universe.cc: util/stats/stats.py: full_system isn't a useful parameter --HG-- extra : convert_revision : 557091be1faa3cf121c55102aba4e6f4c1bd45ef
2005-04-04Add more prefetcher support.Ron Dreslinski
SConscript: Add GHB prefetcher to build list python/m5/objects/BaseCache.mpy: Add parameters about when to remove prefetches and wether or not to use cpuid to differentiate access patterns --HG-- extra : convert_revision : 1d3fef21910f2f34b8c28d01b5f6e86eef53357c
2005-04-02Added support for multiple prefetch address from single access (depth of ↵Ron Dreslinski
prefetch) also added the ability to squash some prefetchs to match the GHB technique python/m5/objects/BaseCache.mpy: Added parameters --HG-- extra : convert_revision : 92b646eb61455d283a5c2ac0b3f8fbd62e39fb87
2005-04-01Some hand mergesRon Dreslinski
--HG-- rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy extra : convert_revision : b24ff4c1feb480cf280207d4bbdfe08ef80d1aa2
2005-03-25Better handling of latency/frequency parameter typesNathan Binkert
python/m5/config.py: Addr is slightly different from memory size in that Addr will take non strings. Deal with the fact that the convert.toFoo functions only accept strings. Add RootFrequency as a special type for the Root.frequency parameter which is not scaled. Add ClockPeriod parameter type. python/m5/convert.py: Be more strict about what's allowed. Only accept strings as inputs for these conversion functions. If the user wants to accept something else, they need to deal with the failure and convert other types on their own. python/m5/objects/Bus.mpy: Use the new ClockPeriod parameter type python/m5/objects/Root.mpy: Can't use integers for frequency anymore python/m5/smartdict.py: rename SmartDict.Proxy to just Variable. Create a new class UndefinedVariable that is returned when the user tries to get a variable that is not in the dict. Undefined variable evaluates to false, and will cause an error elsewhere. --HG-- extra : convert_revision : 1d55246fd1af65106f102396234827d6401ef9ce
2005-03-25Better exceptions in python configNathan Binkert
python/m5/config.py: Don't raise a new exception, just modify and re-raise the old one. --HG-- extra : convert_revision : 47f6da3a8cb2ee18a6b400863e7ea80ab0c9a5ea
2005-03-24Improve toBoolNathan Binkert
python/m5/convert.py: an empty string should still be false --HG-- extra : convert_revision : dd9900794d94cd018b57ec81bcbce1d412e2a83e
2005-03-24Add Frequency and Latency as new parameter types and use themNathan Binkert
where we can python/m5/config.py: Add two new parameter types: Frequency and Latency. These will soon be an integral part of the tick is picosecond thing. If the value can be converted directly to an integer without any special tricks, we assume that the number is the exact value desired. Otherwise, we convert the number assuming that it is in Hz or s. python/m5/objects/Bus.mpy: Use the new Latency and Frequency types where we can --HG-- extra : convert_revision : b3cff6020db83fb819507c348451c98697d1cf27
2005-03-23Formatting fixesNathan Binkert
--HG-- extra : convert_revision : 9a726945b7a1decbecf460df6714257b88742dc8
2005-03-23First step in fixing up parameter handling. Clean up theNathan Binkert
way ranges work, more fully support metric prefixes for all integer types, and convert memory sized parameters to the MemorySize type. python/m5/config.py: - no more _Param and _ParamProxy stuff. Use the names ParamBase and ParamFactory to hopefully make it clearer what we intend. - Get rid of RangeSize and the old Range class and more fully flesh out the Range class to deal with types of parameters and different kinds of ranges. - Call toInteger on the CheckedInt types so we can use metric prefixes in strings for all integers. - Get rid of the K, M, and G constants. Use the proper type or call one of the functions in the convert package. python/m5/convert.py: Simple way to deal with both floating point and integer strings. python/m5/objects/BaseCache.mpy: python/m5/objects/Ethernet.mpy: This is a MemorySize typed parameter --HG-- extra : convert_revision : 92b4ea662d723abdd6c0a49065b79c25400fac9b
2005-03-22styleNathan Binkert
python/m5/convert.py: python/m5/smartdict.py: follow our naming convention --HG-- extra : convert_revision : d57a103dfbad1fb6a076bfacdca226c4b1893fb8
2005-03-22Fix a bug introduced with the multidict commit.Nathan Binkert
python/m5/config.py: search for any base class that is a confignode instead of those that derive from param type so that non-type classes work too. (Those that are just derived from ConfigNode and not SimObject.) --HG-- extra : convert_revision : 422181b2e5efd4675ec34adcffecfb58eee0e4e7
2005-03-22clean up python exceptionsNathan Binkert
python/m5/config.py: clean up exception output a bit. --HG-- extra : convert_revision : a27e75276ffc9001f44c44595172cf2b455e5e23
2005-03-22Use the multidict in the python config stuff. Makes code a bitNathan Binkert
cleaner. python/m5/config.py: Use the multidict instead of the separately coded _getparam and _getvalue stuff. While we're at it, when we see a default parameter, we stick it into the dictionary right away. --HG-- extra : convert_revision : d6f6f5cc454a479e27718ec7952cd7559229ebe7
2005-03-22Sort the sim objects in the python outputNathan Binkert
python/m5/config.py: Turn back on the sorting of sim objects so we get consistent output. This can lead to slight changes in stats. --HG-- extra : convert_revision : 8ef9bd534cd2344acd69af7f52ee90b8b1afeb24
2005-03-19Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Steve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/m5-head --HG-- extra : convert_revision : a1cca61433e2cc9fd99d1a2361d32ea5c91b09c7
2005-03-18Byproducts of aborted attempt to refine 'parent' proxy semantics.Steve Reinhardt
Mostly cleanup of mpy_importer.mpy_parse(). python/m5/__init__.py: Move panic() up to top in case we want to use it in mpy_importer (though I ended up not doing that after all). python/m5/config.py: Add a couple of comments and a check for expressions like parent.any.foo (which is illegal). --HG-- extra : convert_revision : dfc99ac9b1a2d91a736ca0b773b6d3c528a4f3cc
2005-03-17Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/pact05Lisa Hsu
--HG-- extra : convert_revision : a0a10fccc03edcc5164536ea853788b982e332d7
2005-03-17allow the call to len on Value proxy.Lisa Hsu
--HG-- extra : convert_revision : 1a0aaf8db5ef60e0e7fc053bf4605eb90bb6e9e0
2005-03-16Merge zizzer.eecs.umich.edu:/z/stever/bk/m5-headSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/m5-py --HG-- extra : convert_revision : 39f30bd052c0f2b88524311d674bad7a0fae6358
2005-03-16Allow proxies to refer to proxies in config files.Steve Reinhardt
python/m5/config.py: Allow proxies to refer to other proxies and resolve by recurseivly calling unproxy(). Not sure this works completely (since I don't have any examples to test it on) but it doesn't seem to break any existing config scripts. --HG-- extra : convert_revision : d7fc272d0777d85f89104dfb5d1c5e4d8ddd6d6f
2005-03-16Make panic work in m5.configNathan Binkert
python/m5/config.py: get panic from the m5 package. --HG-- extra : convert_revision : 0965c13086f5eef7214298227c34cd9693534555
2005-03-16Enhancements to python config proxy class.Steve Reinhardt
python/m5/config.py: - Enhanced Proxy class now supports subscripting, e.g., parent.cpu[0] or even parent.cpu[0].icache. - Proxy also supports multiplication (e.g., parent.cycle * 3), though this feature has not been tested. - Subscript 0 works even on non-lists, so you can safely say cpu[0] and get the first cpu even if there's only one. - Changed name of proxy object from 'Super' to 'parent', and changed "wild card" notation from plain 'Super' to 'parent.any'. python/m5/objects/AlphaConsole.mpy: python/m5/objects/BaseCPU.mpy: python/m5/objects/BaseSystem.mpy: python/m5/objects/Device.mpy: python/m5/objects/Ethernet.mpy: python/m5/objects/Ide.mpy: python/m5/objects/IntrControl.mpy: python/m5/objects/Pci.mpy: python/m5/objects/PhysicalMemory.mpy: python/m5/objects/Platform.mpy: python/m5/objects/SimConsole.mpy: python/m5/objects/SimpleDisk.mpy: python/m5/objects/Tsunami.mpy: python/m5/objects/Uart.mpy: Change 'Super.foo' to 'parent.foo' (and 'Super' to 'parent.any'). --HG-- extra : convert_revision : f996d0a3366d5e3e60ae5973691148c3d7cd497d
2005-03-15Add a comment to smartdict.py.Steve Reinhardt
python/m5/smartdict.py: Add a comment explaining why this actually works. --HG-- extra : convert_revision : 39cbde547f4bf6cf626ab1c0b6ef56a5788b09b8
2005-03-15get rid of issequence and just use the isinstance builtinNathan Binkert
--HG-- extra : convert_revision : eca99aa35ad5c5c1c86325f55cf693ff585c9826
2005-03-14Fix for using Python 2.4Kevin Lim
--HG-- extra : convert_revision : 1682c4b77a76137974d3cb0d28c36e3d02e4e5cd
2005-03-14Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5Ali Saidi
--HG-- extra : convert_revision : 9eed6f31249ff099464044b32b882b3cc041b57a
2005-03-14put the syscall emulation error stuff to bed, finallyAli Saidi
remove addr from pciconfig objects and update Monet configuration for ron's changes python/m5/objects/Pci.mpy: I was a little over zelous in my removal of addr, this one should have stayed --HG-- extra : convert_revision : 6c94b11d4c63d50ffe5568b16a131a4105654126
2005-03-14- Add capability to auto-generate Param structs fromSteve Reinhardt
.mpy SimObject descriptions. Structs are defined in simobj/param/ObjectName.hh. - Move compile-time python params (from CPPDEFINES) to separate dict from run-time params (from os.environ). The former are needed to generate proper param structs. This also helps prevent users from messing things up by setting the wrong environment vars (which could have overridden compile-time settings in the old system). - Other misc cleanup of m5 python package. SConscript: Include simobj/SConscript build/SConstruct: Fix type in comment python/SConscript: Move CPPDEFINES dict-generating code to m5scons.flatten_defines python/m5/__init__.py: - Generate a build_env SmartDict here to hold compile-time params (passed in via __main__.m5_build_env). - Move panic and env here from config.py. python/m5/config.py: Move panic, env to top level (m5/__init__.py) python/m5/objects/BaseCPU.mpy: Use build_env instead of env for compile-time params python/m5/smartdict.py: Add some comments. sim/sim_object.hh: Include auto-generated Param struct. Not used yet, just here as proof of concept. test/genini.py: Put -E arguments in build_env as well as os.environ --HG-- extra : convert_revision : cf6f4a2565b230c495b33b18612d6030988adac5
2005-03-13Minor Python config bug fix.Steve Reinhardt
python/m5/config.py: Add 'panic' to __all__ (some of Nate's scripts use it). --HG-- extra : convert_revision : ae3e2398dffe3edd17ee0155f38bc757d3552df2
2005-03-13A few fixes after trying one of Nate's job scripts.Steve Reinhardt
python/m5/config.py: Add issequence to __all__ export list. Added some more comments too. --HG-- extra : convert_revision : 17cd9205e43fe276f71563fcb96ec3c5069fcc86
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-25 13:34:59 +0000