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Age
Commit message (
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Author
2006-04-28
random mix of tidbits
Ali Saidi
2006-04-28
add a bridge object, modify bus object to be able to connect to other buses o...
Ali Saidi
2006-04-24
Mostly done with all device models for new memory system. Still need to get t...
Ali Saidi
2006-04-20
make ide disk work for newmem
Ali Saidi
2006-04-11
fullsys now builds and runs for about one cycle
Ali Saidi
2006-04-06
fixes for newmem
Ali Saidi
2006-03-26
Add the bus and connector objects to scons
Ali Saidi
2006-03-25
Implement a very very simple bus
Ali Saidi
2006-03-15
add translations for new sections that are mmapped or when the brk
Ali Saidi
2006-03-10
Compiles now (with CPU_MODELS=SimpleCPU), but hangs
Steve Reinhardt
2006-03-09
Hand merge. Stuff probably doesn't compile.
Gabe Black
2006-03-04
move alpha specific code into arch/alpha
Ali Saidi
2006-03-03
Ethernet devices have an RSS option to tell the driver to
Nathan Binkert
2006-03-01
More progress toward actually running a program.
Steve Reinhardt
2006-02-27
Fixes so that it compiles properly. Still working on .py file issues.
Ron Dreslinski
2006-02-23
Add support for multiple ports on the memory. Hook up simple cpu to memory.
Ron Dreslinski
2006-02-23
Update functional memory to have a response event
Ron Dreslinski
2006-02-20
Get rid of the code that delays PIO write accesses
Nathan Binkert
2006-01-28
Changes for Process object initialization in merged-memory environment.
Steve Reinhardt
2005-11-25
Virtualize sinic
Nathan Binkert
2005-11-21
add support for delaying pio writes until the cache access occurs
Nathan Binkert
2005-11-21
Actually, you should'nt do math on Clock in the config files.
Nathan Binkert
2005-11-21
BARs now of type MemorySize32
Nathan Binkert
2005-11-20
Make it so one can do math with a Clock type in the config files
Nathan Binkert
2005-11-20
Allow long as a multiplier in the python config
Nathan Binkert
2005-11-20
io_bus is split out into pio_bus and dma_bus so that any device
Nathan Binkert
2005-11-02
allow conversion floats -> long so that 100e9 and such work as Ticks
Ali Saidi
2005-11-02
Merge zizzer:/bk/m5
Ali Saidi
2005-11-02
Add Mem/Ethernet latency variability parameter
Ali Saidi
2005-11-02
__init__ should not return anything
Nathan Binkert
2005-11-02
Make vector params interact with proxies properly.
Steve Reinhardt
2005-11-01
Allow math on CheckedInt-derived ParamValue classes w/o
Steve Reinhardt
2005-10-21
Major changes to sinic device model. Rearrage read/write, better
Nathan Binkert
2005-10-18
Shuffle around device names to make things easier to read.
Nathan Binkert
2005-10-18
use the dedicated flag, no more exposing the m5reg directly
Nathan Binkert
2005-10-06
Add execution trace object to Root.
Steve Reinhardt
2005-10-01
Add executable parameter to LiveProcess. This allows the argv[0] value to
Steve Reinhardt
2005-09-17
Fix the EtherDump parameters
Nathan Binkert
2005-09-05
Regression tests now run under scons!
Steve Reinhardt
2005-09-01
Convert type of max_time and progress_interval parameters
Steve Reinhardt
2005-08-30
Build options are set via a build_options file in the
Steve Reinhardt
2005-08-16
Merge m5.eecs.umich.edu:/bk/m5
Benjamin Nash
2005-08-15
Changes for getting FreeBSD to run.
Miguel Serrano
2005-08-15
Fix NextEthernetAddr
Nathan Binkert
2005-07-18
Fix for passing functional memory param to timing mem.
Steve Reinhardt
2005-06-29
Allow CPUs to specify their own CPU ids.
Nathan Binkert
2005-06-27
Implement a state machine clock that acutally limits how fast
Nathan Binkert
2005-06-27
rename m5scons.py scons_helper.py
Nathan Binkert
2005-06-23
Added Float class
Ali Saidi
2005-06-22
Move max_time and progress_interval parameters to the Root
Nathan Binkert
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