Age | Commit message (Collapse) | Author |
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dev/ide_disk.cc:
Fix to PIO writes and also add command needed for shutdown
dev/pcidev.cc:
Change the panic on write to read-only registers to a debug print. The
kernel tries to write back over all of the PCI registers to restore
the saved SRM state, so we need to let it do this without panicing.
sim/system.cc:
Add back increment of number of running systems to allow trap of halt
work correctly.
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kern/tru64/tru64_system.cc:
make binned_fns a parameter for System in addition to Tru64System. Do all the fnEvents setting at the System level, since that is system-independent.
kern/tru64/tru64_system.hh:
deal with FnEvents in the System, and move some fns over to System.
sim/system.cc:
sim/system.hh:
lift binning stuff into System out of Tru64System
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proxies for a real C/C++ scalar value or scalar functor.
This replaces the scalar() and functor() terms that were
previously used in formulas. This helps when dumping
statistics because the formulas are not supposed to change.
cpu/base_cpu.cc:
Add a number of cycles stat to the cpu object that tracks the
number of cycles that the cpu has executed. This starts to pave
the way for cpu cycles being different from event ticks.
cpu/base_cpu.hh:
provide a functor for calculating all simulated instructions
of all CPUs and a virtual function for determining that number.
To deal with the change from functor() to Value::functor()
cpu/simple_cpu/simple_cpu.cc:
simTicks -> numCycles
numInsts is now a real Scalar stat, not a Formula
cpu/simple_cpu/simple_cpu.hh:
numInsts is now a real Scalar stat, not a Formula
count all instructions
sim/stat_control.cc:
simInsts, simTicks, hostMemory, and hostSeconds are no
longer Statistics::Formula but rather Statistics::Value
add new stat for tick frequency
sim/stats.hh:
don't need everything to be extern.
test/Makefile:
Make stuff work a tad bit better
test/stattest.cc:
test out Statistics::Value
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Add support for generic visitors for stats and use them
to implement independent output functions.
Support for mysql output and some initial code for hacking
on mysql output with python
arch/alpha/pseudo_inst.cc:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/sat_counter.cc:
base/sat_counter.hh:
cpu/simple_cpu/simple_cpu.cc:
kern/tru64/tru64_events.cc:
sim/main.cc:
sim/process.cc:
sim/process.hh:
sim/sim_events.cc:
sim/sim_object.cc:
sim/system.hh:
update for changes in stats package
base/statistics.cc:
move the python output code to base/stats/puthon.(cc|hh)
and reimplement it as a visitor.
move the text output code to base/stats/text.(cc|hh) and
reimplement it as a visitor.
move the database stuff into base/stats/statdb.(cc|hh) and
get rid of the class. Put everything as globals in the
Statistics::Database namespace.
allocate unique ids for all stats.
directly implement the check routine and get rid of the
various dumping routines since they're now in separate files.
make sure that no two stats have the same name
clean up some loops
base/statistics.hh:
major changes to the statistics package again
lots of code was factored out of statistics.hh into several
separate files in base/stats/ (this will continue)
There are now two Stat package types Result and Counter that
are specified to allow the user to keep the counted type
separate from the result type. They are currently both doubles
but that's an experiment. There is no more per stat ability to
set the type. Statistics::Counter is not the same as Counter!
Implement a visitor for statistics output so that new output
types can be implemented independently from the stats package
itself.
Add a unique id to each stat so that it can be used to keep
track of stats more simply. This number can also be used in
debugging problems with stats.
Tweak the bucket size stuff a bit to make it work better.
fixed VectorDist size bug
cpu/memtest/memtest.cc:
Fix up for changes in stats package
Don't use value() since it doesn't work with binning. If you
want a number as a stat, and to use it in the program itself,
you really want two separate variables, one that's a stat,
and one that's not.
cpu/memtest/memtest.hh:
Fix up for changes in stats package
test/Makefile:
Try to build stuff now that directories matter
test/stattest.cc:
test all new output types
choose which one with command line options
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and 'type') to be specified via instance name and not just
config class. Old code only did instance-name lookup for
SimObject parameters. This feature makes life easier for
transitioning to the Python script-based config.
sim/builder.cc:
Use ConfigNode::find to look for "type" parameter so it can
be found if set under instance name (not config class).
sim/param.cc:
Make Param<bool> accept "1" for true and "0" for false.
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configuration unnecessarily awkward. Biggest changes are:
- External and internal object names now match in all cases. The
macros still allow them to be different; the only reason I didn't
get rid of that is that the macros themselves should be going away
soon. In the few conflicting cases, I sometimes renamed the C++ object
and sometimes renamed the config object. The latter sets of substitions
are:
s/BaseBus/Bus/;
s/MemoryObject/FunctionalMemory/;
s/MemoryControl/MemoryController/;
s/FUPool/FuncUnitPool/;
- SamplingCPU is temporarily broken... we need to change the model
of how this works in the .ini file. Having it as a CPU proxy is
really awkward.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/process.cc:
Rename objects to match config name.
cpu/base_cpu.cc:
Uncomment SimObject define since SamplingCPU no longer
does this for us.
dev/ethertap.cc:
Use unsigned instead of uint16_t for params.
kern/tru64/tru64_system.cc:
Use unsigned instead of uint64_t for init_param param.
test/paramtest.cc:
Fix old SimObjectParam.
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on various platforms.
base/hashmap.hh:
gcc on Alpha doesn't always define __LP64__,
even though it arguably should.
cpu/exec_context.cc:
Clear register file on non-full-system too (even though
it typically gets overwritten by the initial regs from
the Process object).
sim/process.cc:
Clear initial register copy in Process object.
Not all regs get initialized when the executable is loaded.
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sim object(depends on which platform tsunami/tlaser is being used)
dev/alpha_console.cc:
Use dynamice casting once during build to get at the proper device to calculate the frequency.
It is either a tsunami_IO or a tlaser_clock depending on platform (tsunami/tlaser).
If the simobject is not of either of those types then panic
dev/alpha_console.hh:
Pass in a SimObject * that is to either a tlaser_clock or a tsunami_IO
sim/sim_object.cc:
Make it so that you can have a SimObjectParam of type SimObject:
example:
SimObjectParam<SimObject *> so;
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cpu/exec_context.cc:
you can't delete an element of an array that you newed. oops.
kern/tru64/tru64_events.cc:
changes to reflect .ini changes, and also b/c es_intr and ipintr can happen at ANY point, even within a current calling path being tracked.
sim/system.cc:
can't delete an element of a newed array. must new them separately.
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cpu/exec_context.cc:
nother little bug...forgot to pop off stack as i read off it
sim/system.cc:
forgot to pop off stack as i read off it
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest
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sim/system.cc:
oops, forgot to increment iter.
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cpu/exec_context.cc:
sim/system.cc:
sim/system.hh:
serialization for binning
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choose them at the .ini stage rather than at compile time.
to do it:
in .ini file set binned_fns=foo null bar foo
what this says is, track foo when it is called by null (i.e. anything). bin bar only when it is called by foo.
essentially, if you have a path of functions to track, the 0th, 2nd, 4th fn listed are the fns to track, and the 1st, 3rd, 5th are their respective callers.
base/statistics.hh:
turn it back to FS_MEASURE since we already have a build in place
kern/tru64/tru64_events.cc:
remove FS_MEASURE #defs. add more DPRINTF's. manage an anomaly that happens when tracking idle_thread.
kern/tru64/tru64_events.hh:
remove FS_MEASURE #defs
kern/tru64/tru64_system.cc:
make DumpState print all the time, but only with DPRINTF. add a new parameter to tru64System a vector<string> binned_fns, to read in from .ini file. now all this binning stuff is dynamically generated.
kern/tru64/tru64_system.hh:
remove all static binning stuff, add support for dynamic
sim/system.cc:
change nonPath bin name to Kernel, remove FS_MEASURE
sim/system.hh:
change nonPath to Kernel
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code.
base/statistics.hh:
We're getting rid of FS_MEASURE, but for now, we're going
to still use a compile time flag to turn on and off binning
of statistics. (The flag is STATS_BINNING)
cpu/exec_context.cc:
cpu/exec_context.hh:
kern/tru64/tru64_system.cc:
get rid of FS_MEASURE
cpu/simple_cpu/simple_cpu.cc:
yank the function call tracking code out of the cpu and move
it into the software context class itself.
kern/tru64/tru64_system.hh:
get rid of FS_MEASURE
move all of the tacking stuff to the same place.
sim/system.hh:
cleanup
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sim/sim_object.cc:
serialize objects in the reverse order of their creation.
This causes a SimObject that is dependent on another
to be serialized first. For example, the ethernet device
writes back some data to physical memory while serializing,
so this will cause the physical memory to be serialized
after that, preserving the data written back.
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and member function and will schedule it for the future.
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into zizzer.eecs.umich.edu:/z/alschult/linux
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arch/alpha/alpha_linux_process.cc:
Fixes for Linux emulation:
- stat struct alignment
- osf_{get,set}sysinfo return values
- additional syscall numbers
- initialize $r0 to 0
sim/syscall_emul.cc:
brk(0) just returns brk value (don't update it!)
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arch/alpha/alpha_memory.cc:
dev/alpha_console.cc:
dev/alpha_console.hh:
Merge
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/kernel
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dev/tsunami.cc:
Changed so Tsunami has a pointer to the System to which it belongs.
Now it is derived from generic base class Platform so platform stuff
can be accessed based on the system
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Cleanup and added copyright
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
Added event to skip the "calibrate_delay" function, now calculate
loops_per_jiffy based on frequency, interrupt frequency, and constant
sim/system.hh:
Added pointer to generic Platform base class
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benchmarks for alpha-linux.
arch/alpha/alpha_linux_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit, times and rt_sigaction.
Should eventually provide a function for times.
arch/alpha/alpha_tru64_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit.
sim/syscall_emul.cc:
Added implementations for unlink and rename.
sim/syscall_emul.hh:
Added unlink and rename functions.
Added a couple more ioctl requests to ignore.
Print out the PC of any ioctl commands that fail.
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execution pipeline (Alpha trapb & excb).
Add support for write memory barriers (mostly impacts
store buffer).
Add StaticInst flag to indicate memory barriers, though
this is not modeled in the pipeline yet.
arch/alpha/isa_desc:
Implement trapb, excb, mb, and wmb as insts with
no execution effect (empty execute() function) but
with flags that indicate their side effects.
Also make sure every instruction that needs to go to
the execute stage has a real opClass value, since we
are now using No_OpClass to signal insts that can get
dropped at dispatch.
StaticInst::branchTarget() is now a const method.
cpu/static_inst.hh:
Add flags to indicate serializing insts (trapb, excb) and
memory and write barriers.
Also declare some StaticInst methods as const methods.
dev/etherlink.hh:
sim/eventq.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_object.hh:
Make name() return value const.
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The last change only caught the ones with types that
started with capitals. This pass catches the rest
(mostly STL and uint*_t types).
base/cprintf_formats.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/serialize.cc:
sim/serialize.hh:
Change "foo_t& foo" to "foo_t &foo".
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This primarily to be internally consistent (sometimes we used one,
sometimes the other, even within the same line of code!).
I picked the latter to be symmetric with "Foo *foo".
base/cprintf_formats.hh:
base/range.hh:
base/refcnt.hh:
base/res_list.hh:
base/statistics.hh:
base/str.hh:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/syscall_emul.hh:
Change "Foo& foo" declarations to "Foo &foo".
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sim/universe.cc:
oops. this doesn't exist
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statStream catchall that we had before)
Also provide an optional output directory that multiple simulator output
files can be written to.
Make most output files use the output directory
base/misc.cc:
send warnings to the outputStream as well
base/trace.cc:
dprintf_stream defaults to cerr
dev/console.cc:
use the output directory for the console output if it exists
dev/etherdump.cc:
dump to the output directory if it exists
sim/builder.cc:
sim/builder.hh:
move constructor and destructor to .cc file
use a function to get the stream that the builder dumps its
output to, and create a separate file in the output directory
if able
sim/main.cc:
statStream -> outputStream
sim/serialize.cc:
dump checkpoints to the output directory if specified
sim/universe.cc:
provide an output stream for simulator output. (This takes place of the
statStream catchall that we had before)
Also provide an optional output directory that multiple simulator output
files can be written to.
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arch/alpha/isa_desc:
don't say warn: Warning:
base/misc.cc:
avoid printing two newlines in a row
sim/main.cc:
print out a message just before we enter the event queue
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Move global checkpoint-related functions and vars into Checkpoint class (as statics).
arch/alpha/pseudo_inst.cc:
dev/disk_image.cc:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
sim/serialize.cc:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
Checkpoint constructor now takes checkpoint directory name instead
of file name.
Make serialize:dir parameter actually set checkpoint directory name
instead of directory in which checkpoint directory is created. If
the value contains a '%', the curTick value is sprintf'd into the
format to create the directory name. The default is backwards compatible
with the old fixed name ("m5.%012d").
sim/serialize.hh:
Move global checkpoint-related functions and vars
into Checkpoint class (as statics).
Checkpoint constructor now takes checkpoint directory name instead
of file name.
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base/str.hh:
this should really be inline
base/time.cc:
base/time.hh:
clean up how the time class works. Export only one, and let
people calculate their own elapsed times, etc.
sim/main.cc:
sim/sim_time.X -> base/time.X
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rename : sim/sim_time.cc => base/time.cc
rename : sim/sim_time.hh => base/time.hh
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This lets us centralize priorities so we can see what's going on.
- Shift serialize & cpu-switch events to happen before CPU ticks (to be
consistent with starting new CPU on same cycle instead of next cycle).
- Get rid of unnecessary bus stats reset callback.
cpu/simple_cpu/simple_cpu.cc:
sim/debug.cc:
sim/eventq.hh:
sim/serialize.cc:
sim/sim_events.cc:
sim/sim_events.hh:
Switch events to use a priority enum instead of integers.
This lets us centralize priorities so we can see what's going on.
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a checkpoint now gives identical results to running from scratch
and doing at switchover at the same cycle!
- CPUs start at cycle 0 again, not cycle 1.
- curTick is now serialized & unserialized.
- Stats get reset in main (before event loop). Since this is done
after curTick is unserialized, simTicks gets set correctly for
running from a checkpoint.
- Simplify serialization to happen in a single pass.
- s/Serializeable/Serializable/
arch/alpha/isa_traits.hh:
dev/etherlink.hh:
sim/eventq.cc:
sim/eventq.hh:
s/Serializeable/Serializable/
kern/tru64/tru64_system.cc:
sim/process.cc:
Make initial CPU activation on cycle 0 again (not 1).
sim/main.cc:
Reset stats before getting started.
Make error message on falling out of event loop
more meaningful.
sim/serialize.cc:
sim/serialize.hh:
Get rid of now-useless initial pass; serialization is
done in a single pass now.
Serialize & unserialize curTick.
Wrap curTick and mainEventQueue in a "globals" Serializable object.
s/Serializeable/Serializable/
sim/sim_object.cc:
Add static function to serialize all SimObjects.
sim/sim_object.hh:
Add static function to serialize all SimObjects.
s/Serializeable/Serializable/
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Add reset callback for bus (to fix idle cycles computation).
base/statistics.cc:
base/statistics.hh:
sim/sim_object.cc:
Rename RegResetCallback to registerResetCallback().
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and SimpleCPU::setStatus() into separate functions. For example,
setStatus(Active) is now activate().
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on test5 because of a wrong exit code; fixed that.
sim/main.cc:
No need to ignore SIGPIPE, as far as I know.
sim/sim_events.cc:
A CountedExitEvent is a normal termination, so
should have an exit code of 0.
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I noticed that checkpoints dumped from m5.debug and m5.opt had
differences, which is no longer the case (other than addresses
encoded in names).
cpu/full_cpu/smt.hh:
Get rid of unused SMT_MAX_CPUS.
sim/debug.cc:
Use AutoDelete for DebugBreakEvent.
sim/serialize.cc:
sim/serialize.hh:
Move constructor & destructor to header so they can be inlined.
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