summaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Collapse)Author
2005-11-28Make the debugger a bit more useful with m5.opt by moving stuffNathan Binkert
from #ifdef DEBUG to #ifndef NDEBUG base/remote_gdb.cc: make the remote debugger gdb stuff work in m5.opt sim/system.cc: sim/system.hh: make the console panic break event happen in m5.opt --HG-- extra : convert_revision : 044a9b7cdacb058112388a31315e45c5d8cf70fd
2005-11-22Apply patch for syscall emulation provided by Antti Miettinen ↵Kevin Lim
(apm@brigitte.dna.fi). It provides support for more syscalls in syscall emulation mode. arch/alpha/alpha_linux_process.cc: sim/syscall_emul.cc: sim/syscall_emul.hh: Apply patch for syscall emulation provided by Antti Miettinen (apm@brigitte.dna.fi). --HG-- extra : convert_revision : 37fbc78a927110b7798343afd2c5f37a269e42b4
2005-11-20Serialize the symbol tablesNathan Binkert
base/loader/symtab.cc: Add support for clearing out the symbol table Add support for serializing the symbol table (clear on unserialize) Don't allow empty symbols to be entered into the table base/loader/symtab.hh: Add support for clearing out the symbol table Add support for serializing the symbol table sim/system.cc: Serialize the kernel, console, and palcode symbol tables so that we can capture any dynamic symbols that are added and so that we don't have to have the same kernel binary around to get the symbols right --HG-- extra : convert_revision : 779888c88aa530f3adcd37dc7600a335951d05f7
2005-11-20get rid of allSymtabNathan Binkert
if we want something like allSymtab, we should create a symbol table proxy class --HG-- extra : convert_revision : 20ca551a693b0d6495c018cac8afd63af33f16da
2005-11-10Actually free Process fd_map entries when a file is closed...Steve Reinhardt
amazingly we never did that before. Caused us to run out of file descriptors in twolf. sim/process.cc: Add free_fd() method to free closed target fd in simulator fd map. Rename open_fd() to alloc_fd() for symmetry with free_fd(). sim/process.hh: Add free_fd() method to free closed target fd in simulator fd map. Rename open_fd() to alloc_fd() for symmetry with free_fd(). Crank up MAX_FD while we're at it. sim/syscall_emul.cc: Call free_fd() on process when target closes a file. sim/syscall_emul.hh: Process open_fd() renamed to alloc_fd(). --HG-- extra : convert_revision : d780f4ccfd5a0989230b0afbdbd276212b87550c
2005-11-10Syscall DPRINTF and warning cleanup.Steve Reinhardt
base/trace.hh: Need std:: on DPRINTFR reference to string class. base/traceflags.py: Remove SyscallWarnings trace flag... we should always print warnings so nothing undesirable goes unnoticed. Replaced with (currently unused) Syscall flag. sim/syscall_emul.cc: Change SyscallWarning DPRINTFs into warn() calls. Uncomment SyscallVerbose DPRINTFs. sim/syscall_emul.hh: Change SyscallWarning DPRINTFs into warn() calls. Call fatal() instead of ad-hoc termination. --HG-- extra : convert_revision : dc6c2ce3691a129f697b6a6ae5d889e2dbaab228
2005-11-02Fix bug where simulation terminates same cycle as last stat dump causing a ↵Ali Saidi
duplicate row in db --HG-- extra : convert_revision : 45877c6feeaddf921eb0f4764246bf66e1705a1d
2005-10-18Add new function profiling stuff, wrap the pc_sample stuff into it.Nathan Binkert
SConscript: Get rid of the pc_sample stuff and move to the new profiling stuff base/traceflags.py: DPRINTF Stack stuff cpu/base.cc: cpu/base.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/simple/cpu.cc: Add profiling stuff kern/kernel_stats.hh: Use a smart pointer sim/system.cc: sim/system.hh: Create a new symbol table that has all of the symbols for a particular system util/stats/categories.py: change around the categories, add categories for function profiling stuff util/stats/profile.py: No profile parsing and display code to deal with function profiling stuff, graph, dot, and text outputs. --HG-- extra : convert_revision : b3de0cdc8bd468e42647966e2640ae009bda9eb8
2005-10-13Fix for g++ 4 warning... not sure why this is just popping up now.Steve Reinhardt
sim/system.hh: Fix for g++ 4. --HG-- extra : convert_revision : e169220ba9ca34ebd4ba2bbafadf8de42f005812
2005-10-01Add executable parameter to LiveProcess. This allows the argv[0] value toSteve Reinhardt
stay fixed even if the path to the binary changes, so the simulation results are independent of that path. --HG-- extra : convert_revision : d1109cd284466c14eddc97289908a51e771fc5db
2005-09-24Add functions to System object to set up function-based events,Steve Reinhardt
including automatically fixing up addresses to deal with optionally executed Alpha gp update prolog. SConscript: Remove freebsd_events.cc and linux_events.cc. base/remote_gdb.cc: cpu/pc_event.cc: kern/system_events.cc: kern/system_events.hh: PCEvents now schedule themselves in constructor. cpu/pc_event.hh: PCEvents now schedule themselves in the constructor. Get rid of constructor versions that don't take an address and all the schedule() methods that are now unnecessary. kern/freebsd/freebsd_system.cc: kern/freebsd/freebsd_system.hh: Use new System methods to schedule function-based events. Move FreeBSD-specific function event classes into FreebsdSystem. kern/linux/linux_system.cc: kern/linux/linux_system.hh: Use new System methods to schedule function-based events. Move Linux-specific function event classes into LinuxSystem. kern/tru64/tru64_events.hh: PCEvents now schedule themselves in constructor. Add DebugPrintfrEvent to encapsulate raw setting as new type (to work better with new System function-event method.) kern/tru64/tru64_system.cc: Use new System methods to schedule function-based events. kern/tru64/tru64_system.hh: Add DebugPrintfrEvent to encapsulate raw setting as new type (to work better with new System function-event method.) sim/system.cc: sim/system.hh: Add functions to set up function-based events, including automatically fixing up addresses to deal with optionally executed Alpha gp update prolog. --HG-- extra : convert_revision : c2cf09144297b6602afe755a34a0a2227023783f
2005-09-18fix the MAX_CHECKPOINTS stuffNathan Binkert
sim/serialize.cc: Make the max checkpoint thing actually stop after the last checkpoint --HG-- extra : convert_revision : 091179c4706e9876a9b7e826513c5c14ce6b72af
2005-09-12fixes for gcc 4.0Ali Saidi
base/mysql.hh: include mysql_version to get rid of that annoying mysql error. make sure refcount is set in all constructors base/pollevent.hh: dev/ethertap.hh: dev/pciconfigall.hh: dev/tsunami_cchip.hh: dev/tsunami_io.hh: dev/tsunami_pchip.hh: sim/param.cc: fix for gcc 4 --HG-- extra : convert_revision : be626af2f40ca402818996ef27249ae256c63ef1
2005-09-02Fixes to build with gcc 4.0.Steve Reinhardt
sim/param.hh: Add "template<>" to explicit template specialization. --HG-- extra : convert_revision : 05e2f4ad8141a8782fe09a0b6824baf56c9fc957
2005-09-01Convert type of max_time and progress_interval parametersSteve Reinhardt
from Latency to Tick, and rename max_time to max_tick. python/m5/objects/Root.py: sim/root.cc: Convert type of max_time and progress_interval from Latency to Tick, and rename max_time to max_tick. --HG-- extra : convert_revision : 2f2aacf6321c3003a0ce834acd8fb726abf27ce3
2005-08-30Build options are set via a build_options file in theSteve Reinhardt
build directory instead of being inferred from the name of the build directory. Options are passed to C++ via config/*.hh files instead of via the command line. Build option flags are now always defined to 0 or 1, so checks must use '#if' rather than '#ifdef'. SConscript: MySQL detection moved to SConstruct. Add config/*.hh files (via ConfigFile builder). arch/alpha/alpha_memory.cc: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/isa_traits.hh: base/fast_alloc.hh: base/statistics.cc: base/statistics.hh: base/stats/events.cc: base/stats/events.hh: cpu/base.cc: cpu/base.hh: cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/o3/alpha_cpu.hh: cpu/o3/alpha_cpu_builder.cc: cpu/o3/alpha_cpu_impl.hh: cpu/o3/alpha_dyn_inst.hh: cpu/o3/alpha_dyn_inst_impl.hh: cpu/o3/alpha_params.hh: cpu/o3/commit_impl.hh: cpu/o3/cpu.cc: cpu/o3/cpu.hh: cpu/o3/fetch_impl.hh: cpu/o3/iew.hh: cpu/o3/iew_impl.hh: cpu/o3/regfile.hh: cpu/o3/rename_impl.hh: cpu/o3/rob_impl.hh: cpu/ozone/cpu.hh: cpu/pc_event.cc: cpu/simple/cpu.cc: cpu/simple/cpu.hh: sim/process.cc: sim/process.hh: Convert compile flags from def/undef to 0/1. Set via #include config/*.hh instead of command line. arch/alpha/isa_desc: Convert compile flags from def/undef to 0/1. Set via #include config/*.hh instead of command line. Revamp fenv.h support... most of the ugliness is hidden in base/fenv.hh now. base/mysql.hh: Fix typo in #ifndef guard. build/SConstruct: Build options are set via a build_options file in the build directory instead of being inferred from the name of the build directory. Options are passed to C++ via config/*.hh files instead of via the command line. python/SConscript: Generate m5_build_env directly from scons options instead of indirectly via CPPDEFINES. python/m5/convert.py: Allow '0' and '1' for booleans. Rewrite toBool to use dict. base/fenv.hh: Revamp <fenv.h> support to make it a compile option (so we can test w/o it even if it's present) and to make isa_desc cleaner. --HG-- extra : convert_revision : 8f97dc11185bef5e1865b3269c7341df8525c9ad
2005-08-15Changes for getting FreeBSD to run.Miguel Serrano
SConscript: Added more files to compile: dev/pcifake.cc, dev/isa_fake.cc, kern/freebsd/freebsd_system.cc, kern/freebsd/freebsd_events.cc. arch/alpha/isa_traits.hh: Added constant for argument register 2 as it is needed by FreebsdSystem::doCalibrateClocks(). cpu/exec_context.hh: cpu/o3/alpha_cpu.hh: Replaced htoa()s with gtoh() and htog(). cpu/o3/fetch_impl.hh: cpu/simple/cpu.cc: Replaced htoa() with gtoh(). dev/disk_image.cc: Replaced htoa()s with letoh()s. dev/ide_ctrl.cc: Got rid of magic numbers. Added IdeChannel and IdeRegType type names where necessary. dev/ide_ctrl.hh: Got rid of unnecessary macros. Changed RegType_t to IdeRegType. Changed bmi_regs to allow accessing registers by name instead of just by array index. Added IdeChannel enum type to use in place of bool variables which were used to specify IDE channel. dev/ide_disk.cc: Rewrote IdeDisk::read and IdeDisk::write functions to specify registers by name instead of indexing through an array. dev/ide_disk.hh: Updated command register struct. dev/ns_gige.cc: dev/ns_gige.hh: Made ReadConfig and WriteConfig begin with a lower-case letter. writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pciconfigall.cc: writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pcidev.cc: Cleaned up readConfig() and writeConfig() functions. dev/pcidev.hh: Added macros to make code that works with the BARs (base adress registers) more readable. writeConfig() now takes a pointer to data. dev/pcireg.h: Changed PCIConfig struct to make accessing elements more straight forward. Removed type 1 (for PCI-to-PCI bridges) PCI configuration space struct since it is not used. dev/rtcreg.h: Added macros for bit fields in RTC status registers A & B. dev/sinic.cc: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. The accessing of elements of PCIConfig structure is updated. dev/sinic.hh: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. dev/tsunami_io.cc: Added implementation of new RTC and PIT classes. dev/tsunami_io.hh: Added classes for RTC and PIT modules. dev/tsunamireg.h: Added macros for DMA ports used by Tsunami-Tru64. dev/uart8250.cc: Got rid of a magic number. Transmit (Tx) interrupts should clear upon a read of the Interrupt ID register. dev/uart8250.hh: Added comments and macros dealing with the UART Interrupt ID register. kern/linux/linux_system.cc: Replaced htoa() with htog(). python/m5/objects/Pci.py: PciFake is a python class for Pci Devices that do nothing. python/m5/objects/Tsunami.py: TsunamiFake was renamed as IsaFake. sim/system.cc: Replaced htoa()s with htog()s. dev/isa_fake.cc: New BitKeeper file ``dev/isa_fake.cc'' TsunamiFake was renamed as IsaFake. dev/isa_fake.hh: New BitKeeper file ``dev/isa_fake.hh'' TsunmaiFake was renamed as IsaFake. dev/pitreg.h: New BitKeeper file ``dev/pitreg.h'' Useful macros for working with PIT (Periodic Interval Timer) registers. --HG-- extra : convert_revision : 33f3a8a1034af4f6c71b32dd743e371c8613e780
2005-06-30Fixes for cygwin compile.Steve Reinhardt
dev/ide_atareg.h: Need endian.h for LITTLE_ENDIAN. sim/syscall_emul.hh: Need to include sys/fcntl.h to get O_BINARY. --HG-- extra : convert_revision : 606f9506dc483f3952dcc65b8ba25c28001f2c43
2005-06-29Easier remote debugging at boot time.Nathan Binkert
sim/system.cc: Add a global variable that will tell the remote debugger to wait when a given CPU is is registered. --HG-- extra : convert_revision : a093c9331daa675d4b59a321e53a5da6ea292c40
2005-06-29Allow CPUs to specify their own CPU ids.Nathan Binkert
Make the AlphaConsole calculate the number of CPUs instead of passing that in as a parameter. cpu/base.cc: pass the desired cpu_id into registerExecContext, offsetting it by the thread number. a cpu_id of -1 means that it should be generated for you. cpu/base.hh: Take the cpu_id as a parameter cpu/o3/alpha_cpu_builder.cc: cpu/simple/cpu.cc: Accept the cpu_id as a parameter while we're here, let's remove the multiplier since it is not used. dev/alpha_console.cc: don't take the number of CPUs as a parameter. Calculate it from the system based on the number of CPUs that have been registered. move init() code to startup() to ensure that all CPUs are registerd. dev/alpha_console.hh: python/m5/objects/AlphaConsole.py: don't take the number of CPUs as a parameter. move init() code to startup() to ensure that all CPUs are registerd. python/m5/objects/BaseCPU.py: take the cpu_id as a parameter. Default it to -1 which means that it will be generated. sim/system.cc: allow the registerExecContext functioin to take a desired cpu_id as a parameter. Check to ensure that the id isn't already used. Accept -1 as a request to have an id assigned. sim/system.hh: keep track of the number of registered exec contexts. provide a function for accessing the number of exec contexts that checks to ensure that they are all registered correctly. --HG-- extra : convert_revision : 8e12f96ff8a49fa16cdbbdb4c05c651376c35788
2005-06-28Don't hard code the location of m5AlphaAccess. Instead, move theNathan Binkert
code into a function that can be called by the AlphaConsole class. AlphaConsole will pass in its address. arch/alpha/ev5.hh: Move Phys2K0Seg to ev5.hh and fixup the TSUNAMI uncacheable bits so that they will be converted correctly. dev/alpha_access.h: Do not hard code the location of the AlphaConsole dev/alpha_console.cc: fixup #includes tell the system where the alpha console is sim/system.hh: Provide a function that will tell the system where the AlphaAccess structure (device) lives --HG-- extra : convert_revision : 92d70ca926151a32eebe9925de597459ac58013e
2005-06-28Pass the location of the m5 console backdoor to the consoleNathan Binkert
instead of compiling it into the console version dev/alpha_access.h: move serialization stuff to alpha_console.hh define the ALPHA_ACCESS_BASE in m5 instead of in console.c and have m5 pass the value to the console dev/alpha_console.cc: dev/alpha_console.hh: Move serialization stuff into a derived class of AlphaAccess sim/system.cc: pass the value of ALPHA_ACCESS_BASE to the console code via the m5AlphaAccess console variable. --HG-- extra : convert_revision : 0ea4ba239f03d6dad51a6efae0385aa543064117
2005-06-27Update for console code reorganizationNathan Binkert
dev/alpha_access.h: Update the ALPHA_ACCESS_VERSION move typedefs to this file since they're only used here. dev/alpha_console.cc: formatting sim/system.cc: xxm -> m5 --HG-- extra : convert_revision : 3aeca50d1385034f5a1e20dd8b0abd03bd6f26f0
2005-06-22Move max_time and progress_interval parameters to the RootNathan Binkert
object and get rid of the ParamContext that each used to have. python/m5/objects/Root.py: Add max_time and progress_interval to the Root object sim/root.cc: Add max_time and progress_interval to the Root object. These parameters used to be in their own contexts in sim_events.cc sim/sim_events.cc: Get rid of the ParamContext for max cycles and the progress event. Move the functionality to the Root object sim/sim_events.hh: Move ProgressEvent declaration to the header so that it can be used in other files. --HG-- extra : convert_revision : ff664b806855e8eb9201b8a25392aa53204464f0
2005-06-05Many files:Steve Reinhardt
Update copyright dates and author list SConscript: arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_linux_process.hh: arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/alpha_tru64_process.cc: arch/alpha/alpha_tru64_process.hh: arch/alpha/aout_machdep.h: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/faults.cc: arch/alpha/faults.hh: arch/alpha/isa_desc: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/osfpal.hh: arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: arch/alpha/vptr.hh: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/bitfield.hh: base/callback.hh: base/circlebuf.cc: base/circlebuf.hh: base/cprintf.cc: base/cprintf.hh: base/cprintf_formats.hh: base/crc.hh: base/date.cc: base/dbl_list.hh: base/endian.hh: base/fast_alloc.cc: base/fast_alloc.hh: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/intmath.hh: base/match.cc: base/match.hh: base/misc.cc: base/misc.hh: base/mod_num.hh: base/mysql.cc: base/mysql.hh: base/output.cc: base/output.hh: base/pollevent.cc: base/pollevent.hh: base/predictor.hh: base/random.cc: base/random.hh: base/range.cc: base/range.hh: base/refcnt.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/socket.hh: base/statistics.cc: base/statistics.hh: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/compression/null_compression.hh: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/stats/events.cc: base/stats/events.hh: base/stats/flags.hh: base/stats/mysql.cc: base/stats/mysql.hh: base/stats/mysql_run.hh: base/stats/output.hh: base/stats/statdb.cc: base/stats/statdb.hh: base/stats/text.cc: base/stats/text.hh: base/stats/types.hh: base/stats/visit.cc: base/stats/visit.hh: base/str.cc: base/str.hh: base/time.cc: base/time.hh: base/timebuf.hh: base/trace.cc: base/trace.hh: base/userinfo.cc: base/userinfo.hh: build/SConstruct: cpu/base.cc: cpu/base.hh: cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/inst_seq.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/pc_event.cc: cpu/pc_event.hh: cpu/smt.hh: cpu/static_inst.cc: cpu/static_inst.hh: cpu/memtest/memtest.hh: cpu/o3/sat_counter.cc: cpu/o3/sat_counter.hh: cpu/ozone/cpu.hh: cpu/simple/cpu.cc: cpu/simple/cpu.hh: cpu/trace/opt_cpu.cc: cpu/trace/opt_cpu.hh: cpu/trace/reader/ibm_reader.cc: cpu/trace/reader/ibm_reader.hh: cpu/trace/reader/itx_reader.cc: cpu/trace/reader/itx_reader.hh: cpu/trace/reader/m5_reader.cc: cpu/trace/reader/m5_reader.hh: cpu/trace/reader/mem_trace_reader.cc: cpu/trace/reader/mem_trace_reader.hh: cpu/trace/trace_cpu.cc: cpu/trace/trace_cpu.hh: dev/alpha_access.h: dev/alpha_console.cc: dev/alpha_console.hh: dev/baddev.cc: dev/baddev.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.cc: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/io_device.cc: dev/io_device.hh: dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/pcireg.h: dev/pktfifo.cc: dev/pktfifo.hh: dev/platform.cc: dev/platform.hh: dev/simconsole.cc: dev/simconsole.hh: dev/simple_disk.cc: dev/simple_disk.hh: dev/sinic.cc: dev/sinic.hh: dev/sinicreg.hh: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/tsunamireg.h: dev/uart.cc: dev/uart.hh: dev/uart8250.cc: dev/uart8250.hh: docs/stl.hh: encumbered/cpu/full/op_class.hh: kern/kernel_stats.cc: kern/kernel_stats.hh: kern/linux/linux.hh: kern/linux/linux_syscalls.cc: kern/linux/linux_syscalls.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/linux/linux_threadinfo.hh: kern/linux/printk.cc: kern/linux/printk.hh: kern/system_events.cc: kern/system_events.hh: kern/tru64/dump_mbuf.cc: kern/tru64/dump_mbuf.hh: kern/tru64/mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: kern/tru64/tru64.hh: kern/tru64/tru64_events.cc: kern/tru64/tru64_events.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: python/SConscript: python/m5/__init__.py: python/m5/config.py: python/m5/convert.py: python/m5/multidict.py: python/m5/smartdict.py: sim/async.hh: sim/builder.cc: sim/builder.hh: sim/debug.cc: sim/debug.hh: sim/eventq.cc: sim/eventq.hh: sim/host.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/process.cc: sim/process.hh: sim/root.cc: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: sim/sim_object.cc: sim/sim_object.hh: sim/startup.cc: sim/startup.hh: sim/stat_control.cc: sim/stat_control.hh: sim/stats.hh: sim/syscall_emul.cc: sim/syscall_emul.hh: sim/system.cc: sim/system.hh: test/bitvectest.cc: test/circletest.cc: test/cprintftest.cc: test/genini.py: test/initest.cc: test/lru_test.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/sized_test.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/ccdrv/devtime.c: util/m5/m5.c: util/oprofile-top.py: util/rundiff: util/m5/m5op.h: util/m5/m5op.s: util/stats/db.py: util/stats/dbinit.py: util/stats/display.py: util/stats/info.py: util/stats/print.py: util/stats/stats.py: util/tap/tap.cc: Update copyright dates and author list --HG-- extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2005-06-05move eio stuff to encumberedNathan Binkert
--HG-- extra : convert_revision : 9061382dba285c84931f8825e7159db0e9899944
2005-06-05Merge zizzer.eecs.umich.edu:/bk/m5Nathan Binkert
into crampon.my.domain:/z/binkertn/research/m5/head --HG-- extra : convert_revision : b0c9b044b44a1bfc4cded2ebfa240b799dd4a5a0
2005-06-04Get rid of broken "long help" option.Steve Reinhardt
--HG-- extra : convert_revision : 8b7c646ce416d2a2a4919acbb87c0b6d65920d42
2005-06-04shuffle files around for new directory structureNathan Binkert
--HG-- rename : cpu/base_cpu.cc => cpu/base.cc rename : cpu/base_cpu.hh => cpu/base.hh rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh rename : cpu/full_cpu/smt.hh => cpu/smt.hh rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
2005-06-04BaseSystem -> SystemNathan Binkert
Make System an object that can be instantiated. For operating systems that don't need any OS specific hacks. python/m5/objects/AlphaConsole.py: python/m5/objects/BaseCPU.py: python/m5/objects/Tsunami.py: BaseSystem -> System --HG-- rename : python/m5/objects/BaseSystem.py => python/m5/objects/System.py extra : convert_revision : e5d12db02abef1b0eda720b50dd2c09cb1ac5232
2005-06-03Additions/fixes for Tru64 syscall emulation.Steve Reinhardt
We can now run the SimpleScalar wupwise binary to completion on the test input. Didn't have time to do more testing, but I fixed a major problem w/getdirentries that should help a lot more programs run. arch/alpha/alpha_tru64_process.cc: Add truncate, ftruncate, statfs, and fstatfs. Add v4.x (pre-F64) stat, fstat, and lstat. Add setsysinfo (though all it does is provide more specific warning messages). Fix subtle but major bug in getdirentries. sim/syscall_emul.cc: sim/syscall_emul.hh: Add truncate, ftruncate, statfs, and fstatfs. --HG-- extra : convert_revision : 9037393d00dc49b0074a41603ea647587f5a9ec7
2005-06-02clean up command line stuffNathan Binkert
sim/main.cc: Clean uo usage output and print usage when no options are given Don't accept mpy files anymore since we don't use them. --HG-- extra : convert_revision : c3b16f602f301d2de12547285334c0037d829998
2005-06-01Rename sim/universe.{cc,hh} to root.{cc,hh} (since theSteve Reinhardt
object defined there was renamed Root long ago). SConscript: arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_tru64_process.cc: base/misc.cc: base/pollevent.cc: base/pollevent.hh: base/stats/events.cc: base/trace.hh: cpu/beta_cpu/fetch_impl.hh: cpu/beta_cpu/full_cpu.cc: cpu/beta_cpu/inst_queue_impl.hh: cpu/pc_event.cc: cpu/static_inst.cc: dev/etherbus.cc: dev/etherdump.cc: dev/etherlink.cc: dev/ide_disk.cc: dev/pcidev.cc: sim/builder.cc: sim/eventq.cc: sim/main.cc: sim/root.cc: sim/stat_control.cc: Rename sim/universe.{cc,hh} to root.{cc,hh}. --HG-- rename : sim/universe.cc => sim/root.cc extra : convert_revision : b8699e81e285253d66da75412e7bb2c251c0389a
2005-06-01Standardize clock parameter names to 'clock'.Steve Reinhardt
Fix description for Bus clock_ratio (no longer a ratio). Add Clock param type (generic Frequency or Latency). cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/beta_cpu/alpha_full_cpu_builder.cc: cpu/simple_cpu/simple_cpu.cc: dev/ide_ctrl.cc: dev/ns_gige.cc: dev/ns_gige.hh: dev/pciconfigall.cc: dev/sinic.cc: dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_pchip.cc: dev/uart.cc: python/m5/objects/BaseCPU.py: python/m5/objects/BaseCache.py: python/m5/objects/BaseSystem.py: python/m5/objects/Bus.py: python/m5/objects/Ethernet.py: python/m5/objects/Root.py: sim/universe.cc: Standardize clock parameter names to 'clock'. Fix description for Bus clock_ratio (no longer a ratio). python/m5/config.py: Minor tweaks on Frequency/Latency: - added new Clock param type to avoid ambiguities - factored out init code into getLatency() - made RootFrequency *not* a subclass of Frequency so it can't be directly assigned to a Frequency paremeter --HG-- extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
2005-04-22Make code more portable and port to cygwinNathan Binkert
arch/alpha/alpha_tru64_process.cc: getdirent isn't implemented by cygwin. panic if this function is executed. (It shouldn't be too much to emulate it using opendir, readdir, etc.) arch/alpha/pseudo_inst.cc: Use lseek once and read instead pread. base/intmath.hh: we want int, long, and long long variations of FloorLog2 instead of int32_t, int64_t. Otherwise, we leave one out. base/socket.cc: Fix define that seems to be for apple sim/serialize.cc: don't use the intXX_t stuff, instead, use the real types so we're sure that we cover all of them. --HG-- extra : convert_revision : 9fccaff583100b06bbaafd95a162c4e19beed59e
2005-04-13Make the exit after max checkpoints code compile.Nathan Binkert
sim/serialize.cc: call exitNow instead of SimExit. Include the header too. --HG-- extra : convert_revision : 633a8533b23cac914a2b09bd2d3ea5d85243c675
2005-04-13Add support to limit the number of checkpoints dropped.Nathan Binkert
sim/serialize.hh: Add variables to keep track of the number of checkpoints dropped and maximum allowed. --HG-- extra : convert_revision : 32241b90c58def6958ec84c53cc2cca996007506
2005-04-11Make the notion of a global event tick independent of the actualNathan Binkert
CPU cycle ticks. This allows the user to have CPUs of different frequencies, and also allows frequencies and latencies that are not evenly divisible by the CPU frequency. For now, the CPU frequency is still set to the global frequency, but soon, we'll hopefully make the global frequency fixed at something like 1THz and set all other frequencies independently. arch/alpha/ev5.cc: The cycles counter is based on the current cpu cycle. cpu/base_cpu.cc: frequency isn't the cpu parameter anymore, cycleTime is. cpu/base_cpu.hh: frequency isn't the cpu parameter anymore, cycleTime is. create several public functions for getting the cpu frequency and the numbers of ticks for a given number of cycles, etc. cpu/memtest/memtest.cc: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/trace/trace_cpu.cc: Now that ticks aren't cpu cycles, fixup code to advance by the proper number of ticks. cpu/memtest/memtest.hh: cpu/trace/trace_cpu.hh: Provide a function to get the number of ticks for a given number of cycles. dev/alpha_console.cc: Update for changes in the way that frequencies and latencies are accessed. Move some stuff to init() dev/alpha_console.hh: Need a pointer to the system and the cpu to get the frequency so we can pass the info to the console code. dev/etherbus.cc: dev/etherbus.hh: dev/etherlink.cc: dev/etherlink.hh: dev/ethertap.cc: dev/ide_disk.hh: dev/ns_gige.cc: dev/ns_gige.hh: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. dev/ide_disk.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. Add some extra debugging printfs dev/platform.cc: dev/sinic.cc: dev/sinic.hh: outline the constructor and destructor dev/platform.hh: outline the constructor and destructor. don't keep track of the interrupt frequency. Only provide the accessor function. dev/tsunami.cc: dev/tsunami.hh: outline the constructor and destructor Don't set the interrupt frequency here. Get it from the actual device that does the interrupting. dev/tsunami_io.cc: dev/tsunami_io.hh: Make the interrupt interval a configuration parameter. (And convert the interval to the new latency/frequency stuff in the python) kern/linux/linux_system.cc: update for changes in the way bandwidths are passed from python to C++ to accomidate the new way that ticks works. For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. kern/tru64/tru64_system.cc: For now, we must get the boot cpu's frequency as a parameter since allowing the system to have a pointer to the boot cpu would cause a cycle. python/m5/config.py: Fix support for cycle_time relative latencies and frequencies. Add support for getting a NetworkBandwidth or a MemoryBandwidth. python/m5/objects/BaseCPU.mpy: All CPUs now have a cycle_time. The default is the global frequency, but it is now possible to set the global frequency to some large value (like 1THz) and set each CPU frequency independently. python/m5/objects/BaseCache.mpy: python/m5/objects/Ide.mpy: Make this a Latency parameter python/m5/objects/BaseSystem.mpy: We need to pass the boot CPU's frequency to the system python/m5/objects/Ethernet.mpy: Update parameter types to use latency and bandwidth types python/m5/objects/Platform.mpy: this frequency isn't needed. We get it from the clock interrupt. python/m5/objects/Tsunami.mpy: The clock generator should hold the frequency sim/eventq.hh: Need to remove this assertion because the writeback event queue is different from the CPU's event queue which can cause this assertion to fail. sim/process.cc: Fix comment. sim/system.hh: Struct member to hold the boot CPU's frequency. sim/universe.cc: remove unneeded variable. --HG-- extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-06full_system isn't a useful parameter anymore, get rid of it.Nathan Binkert
python/m5/objects/Root.mpy: sim/universe.cc: util/stats/stats.py: full_system isn't a useful parameter --HG-- extra : convert_revision : 557091be1faa3cf121c55102aba4e6f4c1bd45ef
2005-03-29expose variables for number of global events per simulated second,Nathan Binkert
millisecond, microsecond, etc. so that the user can explicitly convert between system ticks and time and know what sorts of expensive operations are being used for that conversion. arch/alpha/alpha_tru64_process.cc: arch/alpha/pseudo_inst.cc: dev/etherdump.cc: dev/etherlink.cc: dev/ns_gige.cc: dev/sinic.cc: dev/tsunami_io.cc: dev/uart.cc: sim/stat_control.cc: sim/syscall_emul.hh: Use the new variables for getting the event clock dev/etherdump.hh: delete variables that are no longer needed. --HG-- extra : convert_revision : d95fc7d44909443e1b7952a24ef822ef051c7cf2
2005-03-16No need for this ifdef, since the entire process.hh is surounded by an ↵Ron Dreslinski
ifndef FULL_SYSTEM --HG-- extra : convert_revision : 81009e5c468eaaee06c83c35f1d05ed2863299a4
2005-03-16Merge zizzer:/z/m5/Bitkeeper/m5Ron Dreslinski
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1 --HG-- extra : convert_revision : 848757d0f18cfb33620cfa4b084a9b102b2744c0
2005-03-16Fix the bad addr check to check for allowable addresses in the nxm address spaceRon Dreslinski
arch/alpha/alpha_tru64_process.cc: sim/process.cc: sim/process.hh: Add an address range for the nxm sim/syscall_emul.hh: Check to make sure that if we have an nxm config space that the mmap hasn't grown into it --HG-- extra : convert_revision : e479e5240080ae488080d228bafea488835d6e77
2005-03-15Hard code the SimObject::Params structNathan Binkert
sim/sim_object.cc: Add a new constructor that can take the params struct and tweak the old one to create a params struct if we use the old constructor. sim/sim_object.hh: Hard code a Params struct for SimObject that all other params structs can derive from. Move the name string into the struct and update the code accordingly. New constructor that takes the params struct. --HG-- extra : convert_revision : 30761dab31d7257f9e8c864dcd6cae37309163f2
2005-03-14- Add capability to auto-generate Param structs fromSteve Reinhardt
.mpy SimObject descriptions. Structs are defined in simobj/param/ObjectName.hh. - Move compile-time python params (from CPPDEFINES) to separate dict from run-time params (from os.environ). The former are needed to generate proper param structs. This also helps prevent users from messing things up by setting the wrong environment vars (which could have overridden compile-time settings in the old system). - Other misc cleanup of m5 python package. SConscript: Include simobj/SConscript build/SConstruct: Fix type in comment python/SConscript: Move CPPDEFINES dict-generating code to m5scons.flatten_defines python/m5/__init__.py: - Generate a build_env SmartDict here to hold compile-time params (passed in via __main__.m5_build_env). - Move panic and env here from config.py. python/m5/config.py: Move panic, env to top level (m5/__init__.py) python/m5/objects/BaseCPU.mpy: Use build_env instead of env for compile-time params python/m5/smartdict.py: Add some comments. sim/sim_object.hh: Include auto-generated Param struct. Not used yet, just here as proof of concept. test/genini.py: Put -E arguments in build_env as well as os.environ --HG-- extra : convert_revision : cf6f4a2565b230c495b33b18612d6030988adac5
2005-03-11stick all python stuff into a top level python directory.Nathan Binkert
create an m5 package in python/m5 move the objects package into the m5 package move the m5config into the m5 package as config leave both importers outside of the package. SConscript: sim/main.cc: move sim/pyconfig/* -> python python/SConscript: m5config.py -> m5/config.py (now automatically embedded) objects -> python/m5/objects embed all python files in python/m5 python/m5/config.py: importer renamed mpy_importer move code to m5/__init__.py test/genini.py: deal with new python organization keep track of paths we want to add and add them after parameters are parsed. --HG-- rename : sim/pyconfig/SConscript => python/SConscript rename : sim/pyconfig/m5config.py => python/m5/config.py rename : objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.mpy rename : objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.mpy rename : objects/BadDevice.mpy => python/m5/objects/BadDevice.mpy rename : objects/BaseCPU.mpy => python/m5/objects/BaseCPU.mpy rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy rename : objects/BaseSystem.mpy => python/m5/objects/BaseSystem.mpy rename : objects/Bus.mpy => python/m5/objects/Bus.mpy rename : objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.mpy rename : objects/Device.mpy => python/m5/objects/Device.mpy rename : objects/DiskImage.mpy => python/m5/objects/DiskImage.mpy rename : objects/Ethernet.mpy => python/m5/objects/Ethernet.mpy rename : objects/Ide.mpy => python/m5/objects/Ide.mpy rename : objects/IntrControl.mpy => python/m5/objects/IntrControl.mpy rename : objects/MemTest.mpy => python/m5/objects/MemTest.mpy rename : objects/Pci.mpy => python/m5/objects/Pci.mpy rename : objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.mpy rename : objects/Platform.mpy => python/m5/objects/Platform.mpy rename : objects/Process.mpy => python/m5/objects/Process.mpy rename : objects/Repl.mpy => python/m5/objects/Repl.mpy rename : objects/Root.mpy => python/m5/objects/Root.mpy rename : objects/SimConsole.mpy => python/m5/objects/SimConsole.mpy rename : objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.mpy rename : objects/Tsunami.mpy => python/m5/objects/Tsunami.mpy rename : objects/Uart.mpy => python/m5/objects/Uart.mpy extra : convert_revision : aebf6ccda33028b1125974ca8b6aeab6f7570f30
2005-03-10Removed unecessary constructor call at each return.Ali Saidi
arch/alpha/isa_traits.hh: updated copyright date --HG-- extra : convert_revision : 30c5fc0eb94138ebd4ee047ebdbff5121f95e5f1
2005-03-09Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5Ali Saidi
--HG-- extra : convert_revision : a61ddd67647fc6a6e8e12d918cc71ae9da69f869
2005-03-09Changed all syscalls to use syscall return object.Ali Saidi
arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_tru64_process.cc: cpu/exec_context.hh: sim/process.hh: sim/syscall_emul.cc: sim/syscall_emul.hh: Changed all syscalls to use syscall return object arch/alpha/isa_traits.hh: Added syscall return object that packages return value and return status into an object. sim/process.cc: renamed variable name to nm so base class function name() can be called --HG-- extra : convert_revision : 6609c5ffecc9e3519d7a0cd160879fd21d54abfc
2005-03-09Add support for using the variables that m5 was compiled with forNathan Binkert
determining which parameters belong to a class. This allows us to remove the disable flag since it is not the correct model for variable checking anyway. objects/BaseCPU.mpy: Use the FULL_SYSTEM environment variable to enable or disable parameters. sim/pyconfig/m5config.py: remove the disable flag since it is not the correct model for variable checking. --HG-- extra : convert_revision : a8ccb78ba16d23006225df282a09187d32557608