gem5 - gem5

Age	Commit message (Expand)	Author
2006-07-20	Move PioPort timing code into Simple Timing Port object	Ali Saidi
2006-07-12	Be sure to include the EIO sources as well so we can run regression tests.	Kevin Lim
2006-07-05	Remove sampler and serializer. Now they are handled through C++ interacting ...	Kevin Lim
2006-06-30	Merge zizzer:/z/m5/Bitkeeper/newmem	Ron Dreslinski
2006-06-30	All files compile in the mem directory except cache_builder	Ron Dreslinski
2006-06-29	Add in support for quiescing the system, taking checkpoints, restoring from c...	Kevin Lim
2006-06-29	Still missing prefetch and tags directories as well as cache builder.	Ron Dreslinski
2006-06-28	Backing in more changsets, getting closer to compile	Ron Dreslinski
2006-06-17	remove profile.cc	Ali Saidi
2006-06-17	Rename SWIG "main" module to "cc_main" so it's	Steve Reinhardt
2006-06-16	Merge ktlim@zizzer:/bk/newmem	Kevin Lim
2006-06-16	Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered dir...	Kevin Lim
2006-06-13	Move SimObject creation and Port connection loops	Steve Reinhardt
2006-06-11	Merge iceaxe.:/Volumes/work/research/m5/head	Nathan Binkert
2006-06-09	Merge vm1.(none):/home/stever/bk/newmem	Steve Reinhardt
2006-06-09	Move main control from C++ into Python.	Steve Reinhardt
2006-06-07	Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in ...	Kevin Lim
2006-06-02	Merge ktlim@zizzer:/bk/newmem	Kevin Lim
2006-06-02	Fixes to get compiling to work. This is mainly fixing up some includes; chan...	Kevin Lim
2006-05-31	Updated Authors from bk prs info	Ali Saidi
2006-05-31	Merge ktlim@zizzer:/bk/newmem	Kevin Lim
2006-05-31	Streamline interface to Request object.	Steve Reinhardt
2006-05-30	Merge ktlim@zizzer:/bk/m5	Kevin Lim
2006-05-30	Link in Python interpreter.	Steve Reinhardt
2006-05-29	commit a couple of minor things that I forgot to last time.	Ali Saidi
2006-05-22	Clean up libelf handling.	Steve Reinhardt
2006-05-22	New directory structure:	Steve Reinhardt