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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
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SConscript
Age
Commit message (
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Author
2007-02-09
Get rid of the Trace ParamContext and give python direct
Nathan Binkert
2007-01-31
make sparc fs less chatty
Ali Saidi
2007-01-28
Merge zizzer:/bk/newmem
Gabe Black
2007-01-27
I missed a couple of things
Ali Saidi
2007-01-27
While I'm waiting for legion to run make m5 compile with a few more compilers
Ali Saidi
2007-01-27
Merge zizzer:/bk/newmem
Gabe Black
2007-01-26
make our code a little more standards compliant
Ali Saidi
2007-01-03
Merge zizzer:/bk/newmem
Gabe Black
2006-12-21
Expose the C++ event queue to python via the python function
Nathan Binkert
2006-12-21
move the swig initialization calls from src/sim/main.cc to
Nathan Binkert
2006-12-20
Initial work to make remote gdb available in SE mode. This is completely unte...
Gabe Black
2006-12-18
No need to template prefetcher on cache TagStore type.
Steve Reinhardt
2006-12-18
Get rid of generic CacheTags object (fold back into Cache).
Steve Reinhardt
2006-12-04
Turn cache MissQueue/BlockingBuffer into virtual object
Steve Reinhardt
2006-11-27
Add TRACING_ON setting for m5.prof.
Steve Reinhardt
2006-11-13
Expose debugBreakCycle through swig and get rid of
Nathan Binkert
2006-11-12
Create a module called internal where swigged stuff goes.
Nathan Binkert
2006-11-11
set TRACING_ON one way or another explicitly in the
Nathan Binkert
2006-11-09
Get SPARC to the point that it starts running. Add ability to load the ROM bi...
Ali Saidi
2006-11-09
Factor out all of the encumbered stuff into separate SConscript
Nathan Binkert
2006-11-08
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-08
DWARF2 symbol support seems to be broken on Solaris. Use stabs+
Ali Saidi
2006-11-07
Missed this file in my last changeset.
Gabe Black
2006-11-06
Only bother with the device SConscript if you're in FULL_SYSTEM
Gabe Black
2006-11-06
Created seperate SConscript for the dev directory. Made subdirectories for Al...
Gabe Black
2006-11-06
delete pcifake, tsunamifake. Combine BadAddr/IsaFake into one
Ali Saidi
2006-10-28
remove intel nic from SConscript
Ali Saidi
2006-09-18
add boiler plate intel nic code
Ali Saidi
2006-09-11
add annotation code to m5
Ali Saidi
2006-08-16
Fix Physical Memory to allow memory sizes bigger than 128MB.
Ali Saidi
2006-08-15
fixes for gcc 4.1
Ali Saidi
2006-07-20
Merge zizzer:/bk/newmem
Ali Saidi
2006-07-20
Move PioPort timing code into Simple Timing Port object
Ali Saidi
2006-07-12
Be sure to include the EIO sources as well so we can run regression tests.
Kevin Lim
2006-07-05
Remove sampler and serializer. Now they are handled through C++ interacting ...
Kevin Lim
2006-06-30
Merge zizzer:/z/m5/Bitkeeper/newmem
Ron Dreslinski
2006-06-30
All files compile in the mem directory except cache_builder
Ron Dreslinski
2006-06-29
Add in support for quiescing the system, taking checkpoints, restoring from c...
Kevin Lim
2006-06-29
Still missing prefetch and tags directories as well as cache builder.
Ron Dreslinski
2006-06-28
Backing in more changsets, getting closer to compile
Ron Dreslinski
2006-06-17
remove profile.cc
Ali Saidi
2006-06-17
Rename SWIG "main" module to "cc_main" so it's
Steve Reinhardt
2006-06-16
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-06-16
Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered dir...
Kevin Lim
2006-06-13
Move SimObject creation and Port connection loops
Steve Reinhardt
2006-06-11
Merge iceaxe.:/Volumes/work/research/m5/head
Nathan Binkert
2006-06-09
Merge vm1.(none):/home/stever/bk/newmem
Steve Reinhardt
2006-06-09
Move main control from C++ into Python.
Steve Reinhardt
2006-06-07
Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in ...
Kevin Lim
2006-06-02
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
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