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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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path:
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arch
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SConscript
Age
Commit message (
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Author
2012-04-23
ISA: Put parser generated files in a "generated" directory.
Gabe Black
2012-03-09
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Geoffrey Blake
2012-02-07
Faults: Turn off arch/faults.hh
Gabe Black
2011-09-24
SCons: Add a comment I forgot to add in earlier.
Gabe Black
2011-09-24
SCons: Make the ISA parser a source for its output files like the comments say.
Gabe Black
2011-06-02
scons: rename TraceFlags to DebugFlags
Nathan Binkert
2011-03-01
Spelling: Fix the a spelling error by changing mmaped to mmapped.
Gabe Black
2011-01-07
scons: show sources and targets when building, and colorize output.
Steve Reinhardt
2010-12-20
Style: Replace some tabs with spaces.
Gabe Black
2010-11-15
SCons: Cleanup SCons output during compile
Ali Saidi
2010-08-22
X86: Get rid of unused file arguments.hh.
Gabe Black
2010-03-10
scons: import ply to work around scons sys.path weirdness
Nathan Binkert
2010-02-26
cpu_models: get rid of cpu_models.py and move the stuff into SCons
Nathan Binkert
2010-02-26
isa_parser: Make SCons import the isa_parser
Nathan Binkert
2009-07-08
Registers: Add a registers.hh file as an ISA switched header.
Gabe Black
2009-07-08
Registers: Add an ISA object which replaces the MiscRegFile.
Gabe Black
2009-05-12
inorder-alpha-port: initial inorder support of ALPHA
Korey Sewell
2009-02-27
Processes: Make getting and setting system call arguments part of a process o...
Gabe Black
2009-02-25
ISA: Set up common trace flags for tracing registers.
Gabe Black
2008-10-12
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
Gabe Black
2007-11-08
ISA parser: Make the isa parser generate MaxInstSrcRegs and MaxInstDestRegs.
Gabe Black
2007-07-28
style: Check/Fix whitespace on SCons files
Nathan Binkert
2007-03-15
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2007-03-15
Make the predecoder an object with it's own switched header file. Start addin...
Gabe Black
2007-03-10
Rework the way SCons recurses into subdirectories, making it
Nathan Binkert
2006-11-29
Add support for mmapped iprs to atomic cpu
Ali Saidi
2006-11-07
Put kernel_stats back into arch.
Gabe Black
2006-11-07
Made kern a switching header file directory.
Gabe Black
2006-11-06
Remote GDB support has been changed to use inheritance. Alpha should work, bu...
Gabe Black
2006-11-03
Add a new file which describes an ISA's interrupt handling mechanism. It reco...
Gabe Black
2006-10-08
Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)
Steve Reinhardt
2006-08-15
Fixed ALPHA_FS by moving the remnants of isa_fullsys_traits.hh into arch/alph...
Gabe Black
2006-08-11
Pushed most of constants.hh back into isa_traits.hh and regfile.hh and create...
Gabe Black
2006-07-14
Fix the CheckerCPU being included via python.
Kevin Lim
2006-06-17
Fix up code to be able to use the Checker.
Kevin Lim
2006-06-12
Fix python binary name in arch/SConscript.
Steve Reinhardt
2006-06-09
Move main control from C++ into Python.
Steve Reinhardt
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-22
Get rid of FastCPU model.
Steve Reinhardt
2006-05-22
New directory structure:
Steve Reinhardt