index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
alpha
/
interrupts.hh
Age
Commit message (
Expand
)
Author
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2009-06-04
types: clean up types, especially signed vs unsigned
Nathan Binkert
2009-01-25
CPU: Add a setCPU function to the interrupt objects.
Gabe Black
2008-10-21
style: Use the correct m5 style for things relating to interrupts.
Nathan Binkert
2008-10-12
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...
Gabe Black
2008-10-12
CPU: Eliminate the get_vec function.
Gabe Black
2008-09-27
alpha: Clean up namespace usage.
Nathan Binkert
2008-09-27
arch: TheISA shouldn't really ever be used in the arch directory.
Nathan Binkert
2008-09-27
style
Nathan Binkert
2007-03-07
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
Ali Saidi
2007-03-03
Implement Niagara I/O interface and rework interrupts
Ali Saidi
2007-01-08
pagetable.hh:
Lisa Hsu
2006-11-20
Fix typo.
Kevin Lim
2006-11-12
Updates to support new interrupt processing and removal of PcPAL.
Kevin Lim
2006-11-03
Got rid of "inPalMode". Some places are still effectively checking if they ar...
Gabe Black
2006-11-03
Add a new file which describes an ISA's interrupt handling mechanism. It reco...
Gabe Black